OpenCores
URL https://opencores.org/ocsvn/gamepads/gamepads/trunk

Subversion Repositories gamepads

[/] [gamepads/] [trunk/] [gcpad/] [bench/] [vhdl/] [gcpad_mod.vhd] - Blame information for rev 41

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 25 arniml
-------------------------------------------------------------------------------
2
--
3
-- A testbench model for the
4
-- GCpad controller core
5
--
6 41 arniml
-- $Id: gcpad_mod.vhd 41 2009-04-01 19:58:04Z arniml $
7 25 arniml
--
8
-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
9
--
10
-- All rights reserved
11
--
12
-- Redistribution and use in source and synthezised forms, with or without
13
-- modification, are permitted provided that the following conditions are met:
14
--
15
-- Redistributions of source code must retain the above copyright notice,
16
-- this list of conditions and the following disclaimer.
17
--
18
-- Redistributions in synthesized form must reproduce the above copyright
19
-- notice, this list of conditions and the following disclaimer in the
20
-- documentation and/or other materials provided with the distribution.
21
--
22
-- Neither the name of the author nor the names of other contributors may
23
-- be used to endorse or promote products derived from this software without
24
-- specific prior written permission.
25
--
26
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27
-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
28
-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29
-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
30
-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31
-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32
-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33
-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34
-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35
-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36
-- POSSIBILITY OF SUCH DAMAGE.
37
--
38
-- Please report bugs to the author, but before you do so, please
39
-- make sure that this is not a derivative work and that
40
-- you have the latest version of this file.
41
--
42
-- The latest version of this file can be found at:
43
--      http://www.opencores.org/cvsweb.shtml/gamepads/
44
--
45
-- The project homepage is located at:
46
--      http://www.opencores.org/projects.cgi/web/gamepads/overview
47
--
48
-------------------------------------------------------------------------------
49
 
50
library ieee;
51
use ieee.std_logic_1164.all;
52
 
53
entity gcpad_mod is
54
 
55
  generic (
56
    clocks_per_1us_g :       natural := 2
57
  );
58
  port (
59
    clk_i            : in    std_logic;
60
    pad_data_io      : inout std_logic;
61
    rx_data_i        : in    std_logic_vector(63 downto 0)
62
  );
63
 
64
end gcpad_mod;
65
 
66
 
67
architecture behav of gcpad_mod is
68
 
69 28 arniml
  -----------------------------------------------------------------------------
70
  -- Procedure wait_n_us
71
  --
72
  -- Purpose:
73
  --   Waits for the given number of clk_i cycles.
74
  --
75 25 arniml
  procedure wait_n_us(clocks : in natural) is
76
  begin
77
    wait until clk_i = '0';
78
    for i in 1 to clocks loop
79
      wait until clk_i = '1';
80
      wait until clk_i = '0';
81
    end loop;
82
  end wait_n_us;
83 28 arniml
  --
84
  -----------------------------------------------------------------------------
85 25 arniml
 
86
  signal time_cnt_q : natural;
87
  signal timeout_s  : boolean;
88
 
89
begin
90
 
91 28 arniml
  -----------------------------------------------------------------------------
92
  -- Process timeout
93
  --
94
  -- Purpose:
95
  --   Detects a timeout on incoming pad data stream after 5 us of
96
  --   inactivity. Resynchronizes upon falling edge of pad_data_io.
97
  --
98 25 arniml
  timeout: process (clk_i, pad_data_io)
99
  begin
100
    if pad_data_io = '0' then
101
      timeout_s  <= false;
102
      time_cnt_q <= 0;
103
    elsif clk_i'event and clk_i = '1' then
104
      time_cnt_q <= time_cnt_q + 1;
105
 
106
      if time_cnt_q > 5 * clocks_per_1us_g then
107
        timeout_s <= true;
108
      else
109
        timeout_s <= false;
110
      end if;
111
    end if;
112
  end process timeout;
113 28 arniml
  --
114
  -----------------------------------------------------------------------------
115 25 arniml
 
116
 
117 28 arniml
  -----------------------------------------------------------------------------
118
  -- Process model
119
  --
120
  -- Purpose:
121
  --   Simple model for the functionality of a GC controller pad.
122
  --
123
  model: process
124
 
125 25 arniml
    procedure send_packet(packet : in std_logic_vector) is
126
      variable time_low_v, time_high_v : time;
127
    begin
128
      for i in packet'high downto 0 loop
129
        if packet(i) = '0' then
130
          time_low_v  := 3 us;
131
          time_high_v := 1 us;
132
        else
133
          time_low_v  := 1 us;
134
          time_high_v := 3 us;
135
        end if;
136
 
137
        pad_data_io <= '0';
138
        wait for time_low_v;
139
 
140
        pad_data_io <= 'H';
141
        wait for time_high_v;
142
 
143
      end loop;
144
 
145
    end send_packet;
146
 
147
 
148
    variable command_v : std_logic_vector(24 downto 0);
149 28 arniml
    constant id_c      : std_logic_vector(23 downto 0) := "000010010000000000000000";
150 25 arniml
  begin
151
 
152
    loop
153
      command_v   := (others => '1');
154
      pad_data_io <= 'Z';
155
 
156 28 arniml
      -------------------------------------------------------------------------
157
      -- Step 1:
158
      -- Receive command and associated data.
159
      --
160 25 arniml
      wait until pad_data_io = '0';
161
      wait for 1 ns;
162
      for i in 24 downto 0 loop
163
        -- skip rest if timeout occured
164
        if not timeout_s then
165
          wait_n_us(2 * clocks_per_1us_g);
166
 
167
          command_v(i) := pad_data_io;
168
 
169
          if pad_data_io = '0' then
170
            wait until pad_data_io /= '0';
171
          end if;
172
 
173 28 arniml
          -- wait for high -> low edge
174
          wait until (pad_data_io = '0') or timeout_s;
175 25 arniml
 
176
        end if;
177 28 arniml
 
178
        wait for 1 ns;
179 25 arniml
      end loop;
180
 
181 28 arniml
      -------------------------------------------------------------------------
182
      -- Detect command and send response
183
      --
184 25 arniml
      case command_v(24 downto 17) is
185
        -- get ID
186
        when "00000000" =>
187 28 arniml
          wait_n_us(5 * clocks_per_1us_g);
188
          send_packet(id_c);
189
          send_packet("1");
190 25 arniml
 
191
        -- poll status
192
        when "0H000000" =>
193
          wait_n_us(5 * clocks_per_1us_g);
194
          send_packet(rx_data_i);
195
          send_packet("1");
196
 
197
        when others =>
198
          null;
199
 
200
      end case;
201
 
202
    end loop;
203 29 arniml
  end process model;
204 28 arniml
  --
205
  -----------------------------------------------------------------------------
206 25 arniml
 
207
end behav;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.