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[/] [gamepads/] [trunk/] [snespad/] [rtl/] [vhdl/] [snespad_ctrl.vhd] - Blame information for rev 41

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1 3 arniml
-------------------------------------------------------------------------------
2
--
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-- SNESpad controller core
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--
5 41 arniml
-- $Id: snespad_ctrl.vhd 41 2009-04-01 19:58:04Z arniml $
6 3 arniml
--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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-- All rights reserved
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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--
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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--
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-- The latest version of this file can be found at:
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--      http://www.opencores.org/cvsweb.shtml/gamepads/
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--
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-- The project homepage is located at:
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--      http://www.opencores.org/projects.cgi/web/gamepads/overview
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--
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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entity snespad_ctrl is
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  generic (
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    reset_level_g    :     natural := 0;
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    clocks_per_6us_g :     natural := 6
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  );
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  port (
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    -- System Interface -------------------------------------------------------
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    clk_i            : in  std_logic;
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    reset_i          : in  std_logic;
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    clk_en_o         : out boolean;
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    -- Control Interface ------------------------------------------------------
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    shift_buttons_o  : out boolean;
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    save_buttons_o   : out boolean;
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    -- Pad Interface ----------------------------------------------------------
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    pad_clk_o        : out std_logic;
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    pad_latch_o      : out std_logic
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  );
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end snespad_ctrl;
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use work.snespad_pack.all;
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architecture rtl of snespad_ctrl is
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  subtype  clocks_per_6us_t is natural range 0 to clocks_per_6us_g;
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  type state_t is (IDLE,
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                   IDLE2,
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                   LATCH,
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                   READ_PAD);
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  signal pad_latch_q,
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         pad_latch_s  : std_logic;
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  signal pad_clk_q,
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         pad_clk_s  : std_logic;
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  signal num_buttons_read_q : num_buttons_read_t;
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  signal clocks_per_6us_q : clocks_per_6us_t;
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  signal state_q,
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         state_s  : state_t;
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  signal clk_en_s        : boolean;
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  signal shift_buttons_s : boolean;
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begin
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  -- pragma translate_off
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  -----------------------------------------------------------------------------
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  -- Check generics
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  -----------------------------------------------------------------------------
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  assert (reset_level_g = 0) or (reset_level_g = 1)
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    report "reset_level_g must be either 0 or 1!"
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    severity failure;
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  assert clocks_per_6us_g > 1
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    report "clocks_per_6us_g must be at least 2!"
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    severity failure;
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  -- pragma translate_on
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  seq: process (reset_i, clk_i)
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  begin
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    if reset_i = reset_level_g then
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      pad_latch_q <= '1';
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      pad_clk_q   <= '1';
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      num_buttons_read_q <= num_buttons_c-1;
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      clocks_per_6us_q  <= 0;
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      state_q     <= IDLE;
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    elsif clk_i'event and clk_i = '1' then
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      if clk_en_s then
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        clocks_per_6us_q <= 0;
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      else
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        clocks_per_6us_q <= clocks_per_6us_q + 1;
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      end if;
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      if clk_en_s and shift_buttons_s then
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        if num_buttons_read_q = 0 then
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          num_buttons_read_q <= num_buttons_c-1;
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        else
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          num_buttons_read_q <= num_buttons_read_q - 1;
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        end if;
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      end if;
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      if clk_en_s then
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        state_q <= state_s;
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      end if;
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      pad_clk_q   <= pad_clk_s;
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      pad_latch_q <= pad_latch_s;
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    end if;
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  end process;
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  clk_en_s <=  clocks_per_6us_q = clocks_per_6us_g-1;
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  fsm: process (state_q,
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                num_buttons_read_q)
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  begin
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    -- default assignments
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    pad_clk_s       <= '1';
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    pad_latch_s     <= '1';
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    shift_buttons_s <= false;
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    save_buttons_o  <= false;
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    state_s         <= IDLE;
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    case state_q is
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      when IDLE =>
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        save_buttons_o <= true;
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        state_s        <= IDLE2;
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      when IDLE2 =>
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        state_s <= LATCH;
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      when LATCH =>
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        pad_latch_s <= '0';
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        state_s     <= READ_PAD;
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      when READ_PAD =>
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        pad_latch_s <= '0';
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        -- set clock low
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        -- pad data will be read at end of 6us cycle
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        pad_clk_s   <= '0';
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        shift_buttons_s <= true;
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        if num_buttons_read_q = 0 then
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          -- return to IDLE after last button bit has been read
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          state_s <= IDLE;
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        else
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          state_s <= LATCH;
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        end if;
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      when others =>
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        null;
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    end case;
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  end process fsm;
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  -----------------------------------------------------------------------------
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  -- Output Mapping
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  -----------------------------------------------------------------------------
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  clk_en_o        <= clk_en_s;
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  shift_buttons_o <= shift_buttons_s;
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  pad_clk_o       <= pad_clk_q;
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  pad_latch_o     <= pad_latch_q;
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end rtl;

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