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[/] [gbiteth/] [trunk/] [rtl/] [rgmii/] [rgmii100_pll.vhd] - Blame information for rev 3

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1 3 axuan25268
-- megafunction wizard: %ALTPLL%
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-- GENERATION: STANDARD
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-- VERSION: WM1.0
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-- MODULE: altpll 
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-- ============================================================
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-- File Name: rgmii100_pll.vhd
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-- Megafunction Name(s):
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--                      altpll
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--
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-- Simulation Library Files(s):
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--                      altera_mf
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-- ============================================================
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-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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--
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-- 12.0 Build 178 05/31/2012 SJ Full Version
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-- ************************************************************
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--Copyright (C) 1991-2012 Altera Corporation
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--Your use of Altera Corporation's design tools, logic functions 
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--and other software and tools, and its AMPP partner logic 
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--functions, and any output files from any of the foregoing 
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--(including device programming or simulation files), and any 
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--associated documentation or information are expressly subject 
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--to the terms and conditions of the Altera Program License 
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--Subscription Agreement, Altera MegaCore Function License 
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--Agreement, or other applicable license agreement, including, 
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--without limitation, that your use is for the sole purpose of 
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--programming logic devices manufactured by Altera and sold by 
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--Altera or its authorized distributors.  Please refer to the 
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--applicable agreement for further details.
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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LIBRARY altera_mf;
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USE altera_mf.all;
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ENTITY rgmii100_pll IS
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        PORT
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        (
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                inclk0          : IN STD_LOGIC  := '0';
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                c0              : OUT STD_LOGIC
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        );
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END rgmii100_pll;
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ARCHITECTURE SYN OF rgmii100_pll IS
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        SIGNAL sub_wire0        : STD_LOGIC_VECTOR (4 DOWNTO 0);
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        SIGNAL sub_wire1        : STD_LOGIC ;
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        SIGNAL sub_wire2        : STD_LOGIC ;
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        SIGNAL sub_wire3        : STD_LOGIC_VECTOR (1 DOWNTO 0);
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        SIGNAL sub_wire4_bv     : BIT_VECTOR (0 DOWNTO 0);
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        SIGNAL sub_wire4        : STD_LOGIC_VECTOR (0 DOWNTO 0);
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        COMPONENT altpll
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        GENERIC (
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                bandwidth_type          : STRING;
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                clk0_divide_by          : NATURAL;
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                clk0_duty_cycle         : NATURAL;
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                clk0_multiply_by                : NATURAL;
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                clk0_phase_shift                : STRING;
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                compensate_clock                : STRING;
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                inclk0_input_frequency          : NATURAL;
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                intended_device_family          : STRING;
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                lpm_hint                : STRING;
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                lpm_type                : STRING;
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                operation_mode          : STRING;
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                pll_type                : STRING;
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                port_activeclock                : STRING;
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                port_areset             : STRING;
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                port_clkbad0            : STRING;
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                port_clkbad1            : STRING;
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                port_clkloss            : STRING;
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                port_clkswitch          : STRING;
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                port_configupdate               : STRING;
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                port_fbin               : STRING;
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                port_inclk0             : STRING;
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                port_inclk1             : STRING;
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                port_locked             : STRING;
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                port_pfdena             : STRING;
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                port_phasecounterselect         : STRING;
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                port_phasedone          : STRING;
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                port_phasestep          : STRING;
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                port_phaseupdown                : STRING;
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                port_pllena             : STRING;
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                port_scanaclr           : STRING;
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                port_scanclk            : STRING;
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                port_scanclkena         : STRING;
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                port_scandata           : STRING;
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                port_scandataout                : STRING;
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                port_scandone           : STRING;
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                port_scanread           : STRING;
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                port_scanwrite          : STRING;
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                port_clk0               : STRING;
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                port_clk1               : STRING;
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                port_clk2               : STRING;
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                port_clk3               : STRING;
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                port_clk4               : STRING;
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                port_clk5               : STRING;
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                port_clkena0            : STRING;
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                port_clkena1            : STRING;
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                port_clkena2            : STRING;
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                port_clkena3            : STRING;
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                port_clkena4            : STRING;
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                port_clkena5            : STRING;
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                port_extclk0            : STRING;
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                port_extclk1            : STRING;
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                port_extclk2            : STRING;
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                port_extclk3            : STRING;
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                width_clock             : NATURAL
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        );
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        PORT (
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                        clk     : OUT STD_LOGIC_VECTOR (4 DOWNTO 0);
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                        inclk   : IN STD_LOGIC_VECTOR (1 DOWNTO 0)
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        );
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        END COMPONENT;
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BEGIN
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        sub_wire4_bv(0 DOWNTO 0) <= "0";
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        sub_wire4    <= To_stdlogicvector(sub_wire4_bv);
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        sub_wire1    <= sub_wire0(0);
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        c0    <= sub_wire1;
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        sub_wire2    <= inclk0;
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        sub_wire3    <= sub_wire4(0 DOWNTO 0) & sub_wire2;
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        altpll_component : altpll
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        GENERIC MAP (
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                bandwidth_type => "AUTO",
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                clk0_divide_by => 2,
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                clk0_duty_cycle => 50,
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                clk0_multiply_by => 1,
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                clk0_phase_shift => "20000",
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                compensate_clock => "CLK0",
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                inclk0_input_frequency => 40000,
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                intended_device_family => "Cyclone IV E",
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                lpm_hint => "CBX_MODULE_PREFIX=rgmii100_pll",
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                lpm_type => "altpll",
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                operation_mode => "NORMAL",
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                pll_type => "AUTO",
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                port_activeclock => "PORT_UNUSED",
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                port_areset => "PORT_UNUSED",
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                port_clkbad0 => "PORT_UNUSED",
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                port_clkbad1 => "PORT_UNUSED",
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                port_clkloss => "PORT_UNUSED",
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                port_clkswitch => "PORT_UNUSED",
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                port_configupdate => "PORT_UNUSED",
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                port_fbin => "PORT_UNUSED",
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                port_inclk0 => "PORT_USED",
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                port_inclk1 => "PORT_UNUSED",
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                port_locked => "PORT_UNUSED",
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                port_pfdena => "PORT_UNUSED",
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                port_phasecounterselect => "PORT_UNUSED",
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                port_phasedone => "PORT_UNUSED",
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                port_phasestep => "PORT_UNUSED",
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                port_phaseupdown => "PORT_UNUSED",
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                port_pllena => "PORT_UNUSED",
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                port_scanaclr => "PORT_UNUSED",
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                port_scanclk => "PORT_UNUSED",
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                port_scanclkena => "PORT_UNUSED",
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                port_scandata => "PORT_UNUSED",
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                port_scandataout => "PORT_UNUSED",
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                port_scandone => "PORT_UNUSED",
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                port_scanread => "PORT_UNUSED",
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                port_scanwrite => "PORT_UNUSED",
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                port_clk0 => "PORT_USED",
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                port_clk1 => "PORT_UNUSED",
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                port_clk2 => "PORT_UNUSED",
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                port_clk3 => "PORT_UNUSED",
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                port_clk4 => "PORT_UNUSED",
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                port_clk5 => "PORT_UNUSED",
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                port_clkena0 => "PORT_UNUSED",
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                port_clkena1 => "PORT_UNUSED",
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                port_clkena2 => "PORT_UNUSED",
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                port_clkena3 => "PORT_UNUSED",
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                port_clkena4 => "PORT_UNUSED",
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                port_clkena5 => "PORT_UNUSED",
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                port_extclk0 => "PORT_UNUSED",
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                port_extclk1 => "PORT_UNUSED",
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                port_extclk2 => "PORT_UNUSED",
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                port_extclk3 => "PORT_UNUSED",
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                width_clock => 5
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        )
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        PORT MAP (
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                inclk => sub_wire3,
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                clk => sub_wire0
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        );
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197
END SYN;
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-- ============================================================
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-- CNX file retrieval info
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-- ============================================================
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-- Retrieval info: PRIVATE: ACTIVECLK_CHECK STRING "0"
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-- Retrieval info: PRIVATE: BANDWIDTH STRING "1.000"
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-- Retrieval info: PRIVATE: BANDWIDTH_FEATURE_ENABLED STRING "1"
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-- Retrieval info: PRIVATE: BANDWIDTH_FREQ_UNIT STRING "MHz"
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-- Retrieval info: PRIVATE: BANDWIDTH_PRESET STRING "Low"
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-- Retrieval info: PRIVATE: BANDWIDTH_USE_AUTO STRING "1"
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-- Retrieval info: PRIVATE: BANDWIDTH_USE_PRESET STRING "0"
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-- Retrieval info: PRIVATE: CLKBAD_SWITCHOVER_CHECK STRING "0"
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-- Retrieval info: PRIVATE: CLKLOSS_CHECK STRING "0"
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-- Retrieval info: PRIVATE: CLKSWITCH_CHECK STRING "0"
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-- Retrieval info: PRIVATE: CNX_NO_COMPENSATE_RADIO STRING "0"
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-- Retrieval info: PRIVATE: CREATE_CLKBAD_CHECK STRING "0"
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-- Retrieval info: PRIVATE: CREATE_INCLK1_CHECK STRING "0"
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-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
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-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0"
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-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "7"
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-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
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-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
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-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "12.500000"
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-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
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-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
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-- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
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-- Retrieval info: PRIVATE: GLOCKED_FEATURE_ENABLED STRING "0"
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-- Retrieval info: PRIVATE: GLOCKED_MODE_CHECK STRING "0"
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-- Retrieval info: PRIVATE: GLOCK_COUNTER_EDIT NUMERIC "1048575"
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-- Retrieval info: PRIVATE: HAS_MANUAL_SWITCHOVER STRING "1"
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-- Retrieval info: PRIVATE: INCLK0_FREQ_EDIT STRING "25.000"
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-- Retrieval info: PRIVATE: INCLK0_FREQ_UNIT_COMBO STRING "MHz"
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-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT STRING "100.000"
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-- Retrieval info: PRIVATE: INCLK1_FREQ_EDIT_CHANGED STRING "1"
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-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_CHANGED STRING "1"
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-- Retrieval info: PRIVATE: INCLK1_FREQ_UNIT_COMBO STRING "MHz"
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-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
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-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
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-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "0"
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-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
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-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
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-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
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-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
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-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
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-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
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-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
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-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "12.50000000"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
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-- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
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-- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
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-- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "90.00000000"
251
-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
252
-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
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-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
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-- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0"
255
-- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
256
-- Retrieval info: PRIVATE: PLL_ENHPLL_CHECK NUMERIC "0"
257
-- Retrieval info: PRIVATE: PLL_FASTPLL_CHECK NUMERIC "0"
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-- Retrieval info: PRIVATE: PLL_FBMIMIC_CHECK STRING "0"
259
-- Retrieval info: PRIVATE: PLL_LVDS_PLL_CHECK NUMERIC "0"
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-- Retrieval info: PRIVATE: PLL_PFDENA_CHECK STRING "0"
261
-- Retrieval info: PRIVATE: PLL_TARGET_HARCOPY_CHECK NUMERIC "0"
262
-- Retrieval info: PRIVATE: PRIMARY_CLK_COMBO STRING "inclk0"
263
-- Retrieval info: PRIVATE: RECONFIG_FILE STRING "rgmii100_pll.mif"
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-- Retrieval info: PRIVATE: SACN_INPUTS_CHECK STRING "0"
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-- Retrieval info: PRIVATE: SCAN_FEATURE_ENABLED STRING "1"
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-- Retrieval info: PRIVATE: SELF_RESET_LOCK_LOSS STRING "0"
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-- Retrieval info: PRIVATE: SHORT_SCAN_RADIO STRING "0"
268
-- Retrieval info: PRIVATE: SPREAD_FEATURE_ENABLED STRING "0"
269
-- Retrieval info: PRIVATE: SPREAD_FREQ STRING "50.000"
270
-- Retrieval info: PRIVATE: SPREAD_FREQ_UNIT STRING "KHz"
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-- Retrieval info: PRIVATE: SPREAD_PERCENT STRING "0.500"
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-- Retrieval info: PRIVATE: SPREAD_USE STRING "0"
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-- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
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-- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
275
-- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
276
-- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
277
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
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-- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
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-- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
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-- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
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-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
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-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
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-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "2"
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-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
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-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
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-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "20000"
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-- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
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-- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "40000"
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-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
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-- Retrieval info: CONSTANT: LPM_TYPE STRING "altpll"
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-- Retrieval info: CONSTANT: OPERATION_MODE STRING "NORMAL"
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-- Retrieval info: CONSTANT: PLL_TYPE STRING "AUTO"
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-- Retrieval info: CONSTANT: PORT_ACTIVECLOCK STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_ARESET STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_CLKBAD0 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_CLKBAD1 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_CLKLOSS STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_CLKSWITCH STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_CONFIGUPDATE STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_FBIN STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_INCLK0 STRING "PORT_USED"
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-- Retrieval info: CONSTANT: PORT_INCLK1 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_LOCKED STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_PFDENA STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_PHASECOUNTERSELECT STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_PHASEDONE STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_PHASESTEP STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_PHASEUPDOWN STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_PLLENA STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_SCANACLR STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_SCANCLK STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_SCANCLKENA STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_SCANDATA STRING "PORT_UNUSED"
315
-- Retrieval info: CONSTANT: PORT_SCANDATAOUT STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_SCANDONE STRING "PORT_UNUSED"
317
-- Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED"
318
-- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
319
-- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
320
-- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED"
321
-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clkena0 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clkena1 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clkena2 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clkena3 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clkena4 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_clkena5 STRING "PORT_UNUSED"
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-- Retrieval info: CONSTANT: PORT_extclk0 STRING "PORT_UNUSED"
332
-- Retrieval info: CONSTANT: PORT_extclk1 STRING "PORT_UNUSED"
333
-- Retrieval info: CONSTANT: PORT_extclk2 STRING "PORT_UNUSED"
334
-- Retrieval info: CONSTANT: PORT_extclk3 STRING "PORT_UNUSED"
335
-- Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5"
336
-- Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]"
337
-- Retrieval info: USED_PORT: @inclk 0 0 2 0 INPUT_CLK_EXT VCC "@inclk[1..0]"
338
-- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
339
-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
340
-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
341
-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
342
-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
343
-- Retrieval info: GEN_FILE: TYPE_NORMAL rgmii100_pll.vhd TRUE
344
-- Retrieval info: GEN_FILE: TYPE_NORMAL rgmii100_pll.ppf TRUE
345
-- Retrieval info: GEN_FILE: TYPE_NORMAL rgmii100_pll.inc FALSE
346
-- Retrieval info: GEN_FILE: TYPE_NORMAL rgmii100_pll.cmp TRUE
347
-- Retrieval info: GEN_FILE: TYPE_NORMAL rgmii100_pll.bsf FALSE
348
-- Retrieval info: GEN_FILE: TYPE_NORMAL rgmii100_pll_inst.vhd FALSE
349
-- Retrieval info: LIB_FILE: altera_mf
350
-- Retrieval info: CBX_MODULE_PREFIX: ON

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