OpenCores
URL https://opencores.org/ocsvn/gecko3/gecko3/trunk

Subversion Repositories gecko3

[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-fw/] [gecko3-util/] [gecko3-util.h] - Blame information for rev 31

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 9 nussgipfel
/***********************************************************
2
 *  Gecko3 SoC HW/SW Development Board
3
 *   ___    ___   _   _
4
 *  (  _`\ (  __)( ) ( )
5
 *  | (_) )| (   | |_| |   Berne University of Applied Sciences
6
 *  |  _ <'|  _) |  _  |   School of Engineering and
7
 *  | (_) )| |   | | | |   Information Technology
8
 *  (____/'(_)   (_) (_)
9
 *
10
 *
11
 * This program is free software: you can redistribute it and/or modify
12
 * it under the terms of the GNU General Public License as published by
13
 * the Free Software Foundation, either version 3 of the License, or
14
 * (at your option) any later version.
15
 *
16
 * This program is distributed in the hope that it will be useful,
17
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
 * GNU General Public License for more details.
20
 * You should have received a copy of the GNU General Public License
21
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
22
 */
23
 
24
/************************************************************/
25
/** \file    gecko3-util.h
26
 *************************************************************
27
 *  \brief   Commands used by GECKO3COM
28
 *
29
 *           Here are the definitions of the commands interpreted
30
 *           by the GECKO3COM firmware.
31
 *           Mainly these are IEEE488 messages used with the USB
32
 *           Test and Measurement Class (TMC).
33
 *           We implemented also a few vendor specific USB commands
34
 *           to write the serial number and the FPGA type.
35
 *
36
 *  \author  Christoph Zimmermann bfh.ch
37
 *  \date    17.09.2007 first version
38
 *
39
 */
40
 
41
#ifndef _GECKO3_UTIL_H_
42
#define _GECKO3_UTIL_H_
43
 
44
 
45
#define GECKO3COM_VID         0x0547
46
#define GECKO3COM_PID         0x0002
47
 
48
#define GECKO3COM_IF          1
49
#define TIMEOUT               500
50
 
51
#define FPGA_TYPE_LEN           16
52
#define FPGA_IDCODE_LEN         10   /* the JTAG chip IDCODE is a 32 bit integer but stored as 0x11223344 */
53
#define SERIAL_NO_LEN           8
54
 
55
/* bit masks for the Flags variable */
56
#define FL_SET_SERIAL         0x01
57
#define FL_SET_HW_REV         0x02
58
#define FL_SET_FPGA_TYPE      0x04      
59
#define FL_SET_FPGA_IDCODE    0x08
60
 
61
 
62
/* ----------------------------------------------------------------
63
 *                      Vendor bmRequestType's
64
 * --------------------------------------------------------------*/
65
 
66
#define VRT_VENDOR_IN                   0xC0
67
#define VRT_VENDOR_OUT                  0x40
68
 
69
/* ----------------------------------------------------------------
70
 *                        GECKO3COM Vendor Requests
71
 *
72
 * Note that Cypress reserves [0xA0,0xAF].
73
 * 0xA0 is the firmware load function.
74
 * --------------------------------------------------------------*/
75
 
76
 
77
/* IN commands */
78
 
79
/* #define      VRQ_GET_STATUS                  0x80 */
80
 
81
 
82
/* OUT commands */
83
 
84
#define VRQ_SET_SERIAL                  0x01    
85
 
86
#define VRQ_SET_HW_REV                  0x02
87
 
88
#define VRQ_SET_FPGA_TYPE               0x03    
89
 
90
#define VRQ_SET_FPGA_IDCODE             0x04    
91
 
92
 
93
#define bmRT_DIR_MASK           (0x1 << 7)
94
#define bmRT_DIR_IN             (1 << 7)
95
#define bmRT_DIR_OUT            (0 << 7)
96
 
97
#define bmRT_TYPE_MASK          (0x3 << 5)
98
#define bmRT_TYPE_STD           (0 << 5)
99
#define bmRT_TYPE_CLASS         (1 << 5)
100
#define bmRT_TYPE_VENDOR        (2 << 5)
101
#define bmRT_TYPE_RESERVED      (3 << 5)
102
 
103
#define bmRT_RECIP_MASK         (0x1f << 0)
104
#define bmRT_RECIP_DEVICE       (0 << 0)
105
#define bmRT_RECIP_INTERFACE    (1 << 0)
106
#define bmRT_RECIP_ENDPOINT     (2 << 0)
107
#define bmRT_RECIP_OTHER        (3 << 0)
108
 
109
 
110
/* standard request codes (bRequest) */
111
 
112
#define RQ_GET_STATUS           0
113
#define RQ_CLEAR_FEATURE        1
114
#define RQ_RESERVED_2           2
115
#define RQ_SET_FEATURE          3
116
#define RQ_RESERVED_4           4
117
#define RQ_SET_ADDRESS          5
118
#define RQ_GET_DESCR            6
119
#define RQ_SET_DESCR            7
120
#define RQ_GET_CONFIG           8
121
#define RQ_SET_CONFIG           9
122
#define RQ_GET_INTERFACE       10
123
#define RQ_SET_INTERFACE       11
124
#define RQ_SYNCH_FRAME         12
125
 
126
/* standard descriptor types */
127
 
128
#define DT_DEVICE               1
129
#define DT_CONFIG               2
130
#define DT_STRING               3
131
#define DT_INTERFACE            4
132
#define DT_ENDPOINT             5
133
#define DT_DEVQUAL              6
134
#define DT_OTHER_SPEED          7
135
#define DT_INTERFACE_POWER      8
136
 
137
/* standard feature selectors */
138
 
139
#define FS_ENDPOINT_HALT        0        /* recip: endpoint */
140
#define FS_DEV_REMOTE_WAKEUP    1       /* recip: device */
141
#define FS_TEST_MODE            2       /* recip: device */
142
 
143
/* Get Status device attributes */
144
 
145
#define bmGSDA_SELF_POWERED     0x01
146
#define bmGSDA_REM_WAKEUP       0x02
147
 
148
#endif /* _GECKO3_UTIL_H_ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.