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#*****************************************************************

#   compxlib initialization file (compxlib.cfg)                  *

#                                                                *

#   Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.   *

#                                                                *

#   Important :-                                                 *

#       All options/variables must start from first column       *

#                                                                *

#*****************************************************************

#

RELEASE_VERSION:J.33

#

# set current simulator name

SIMULATOR_NAME:mti_se

#

# set current language name

LANGUAGE_NAME:vhdl

#

# set compilation execution mode

EXECUTE:on

#

# compile additional libraries in architecture specfic directories

EXTRACT_LIB_FROM_ARCH:on

#

MAP_PRE_COMPILED_LIBS:off

#

# donot re-compile dependent libraries

LOCK_PRECOMPILED:off

#

# print compilation command template in log file

LOG_CMD_TEMPLATE:off

#

# print Pre-Compiled library info

PRECOMPILED_INFO:on

#

# create backup copy of setup files

BACKUP_SETUP_FILES:on

#

# use enhanced compilation techniques for faster library compilation

# (applicable to selected libraries only)

FAST_COMPILE:on

#

# abort compilation process if errors are detected in the library

ABORT_ON_ERROR:off

#

# save compilation results to log file with the name specified with -log option

ADD_COMPILATION_RESULTS_TO_LOG:on

#

# compile library in the directory specified by the environment variable if the

# -dir option is not specified

USE_OUTPUT_DIR_ENV:NONE

#

# turn on/off smartmodel installation process

INSTALL_SMARTMODEL:on

#

# smartmodel installation directory

INSTALL_SMARTMODEL_DIR:

#

#///////////////////////////////////////////////////////////////////////

# MTI-SE setup file name

SET:mti_se:MODELSIM=modelsim.ini

#

# MTI-SE options for VHDL Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vcom -work   

#

OPTION:mti_se:vhdl:u:-source -93

OPTION:mti_se:vhdl:s:-source -93

OPTION:mti_se:vhdl:c:-source -93 -explicit

OPTION:mti_se:vhdl:m:-source -93

OPTION:mti_se:vhdl:a:-source -93

OPTION:mti_se:vhdl:r:-source -93

#

# MTI-SE options for VERILOG Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vlog -work   

#

OPTION:mti_se:verilog:u:-source -93

OPTION:mti_se:verilog:s:-source -93

OPTION:mti_se:verilog:n:-source -93

OPTION:mti_se:verilog:c:-source -93

OPTION:mti_se:verilog:m:-source -93

OPTION:mti_se:verilog:a:-source -93

OPTION:mti_se:verilog:r:-source -93

#

#///////////////////////////////////////////////////////////////////////

# MTI-PE setup file name

SET:mti_pe:MODELSIM=modelsim.ini

#

# MTI-PE options for VHDL Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vcom -work   

#

OPTION:mti_pe:vhdl:u:-source -93

OPTION:mti_pe:vhdl:s:-source -93

OPTION:mti_pe:vhdl:c:-source -93 -explicit

OPTION:mti_pe:vhdl:m:-source -93

OPTION:mti_pe:vhdl:a:-source -93

OPTION:mti_pe:vhdl:r:-source -93

#

# MTI-PE options for VERILOG Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vlog -work   

#

OPTION:mti_pe:verilog:u:-source -93

OPTION:mti_pe:verilog:s:-source -93

OPTION:mti_pe:verilog:n:-source -93

OPTION:mti_pe:verilog:c:-source -93

OPTION:mti_pe:verilog:m:-source -93

OPTION:mti_pe:verilog:a:-source -93

OPTION:mti_pe:verilog:r:-source -93

#

#///////////////////////////////////////////////////////////////////////

# NCSIM setup file names

SET:ncsim:CDS=cds.lib

SET:ncsim:HDL=hdl.var

#

# NCSIM options for VHDL Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# ncvhdl -work   

#

OPTION:ncsim:vhdl:u:-MESSAGES -v93  -RELAX -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:vhdl:s:-MESSAGES -v93  -RELAX -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:vhdl:c:-MESSAGES -v93  -RELAX -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:vhdl:m:-MESSAGES -v93  -RELAX -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:vhdl:a:-MESSAGES -v93  -RELAX -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:vhdl:r:-MESSAGES -v93  -RELAX -NOLOG -CDSLIB $CDS -HDLVAR $HDL

#

# NCSIM options for VERILOG Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# ncvlog -work   

#

OPTION:ncsim:verilog:u:-MESSAGES -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:verilog:s:-MESSAGES -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:verilog:n:-MESSAGES -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:verilog:c:-MESSAGES -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:verilog:m:-MESSAGES -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:verilog:a:-MESSAGES -NOLOG -CDSLIB $CDS -HDLVAR $HDL

OPTION:ncsim:verilog:r:-MESSAGES -NOLOG -CDSLIB $CDS -HDLVAR $HDL

#

#///////////////////////////////////////////////////////////////////////

# ISIM setup file name

SET:xilisim:XILISIM=xilinxsim.ini

#

# ISIM options for VHDL Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vhpcomp -work   

#

OPTION:xilisim:vhdl:u:-nocodegen -compact

OPTION:xilisim:vhdl:s:-nocodegen -compact

OPTION:xilisim:vhdl:c:-nocodegen -compact

OPTION:xilisim:vhdl:m:-nocodegen -compact

OPTION:xilisim:vhdl:a:-nocodegen -compact

OPTION:xilisim:vhdl:r:-nocodegen -compact

#

# ISIM options for VERILOG Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vlogcomp -work   

#

OPTION:xilisim:verilog:u:-nocodegen -compact

OPTION:xilisim:verilog:s:-nocodegen -compact

OPTION:xilisim:verilog:n:-nocodegen -compact

OPTION:xilisim:verilog:c:-nocodegen -compact

OPTION:xilisim:verilog:m:-nocodegen -compact

OPTION:xilisim:verilog:a:-nocodegen -compact

OPTION:xilisim:verilog:r:-nocodegen -compact

#

#///////////////////////////////////////////////////////////////////////

# VCS-MX/VCS-Mxi setup file name

SET:vcs_mx:SYNOPSYS=synopsys_sim.setup

#

# VCS-MX/VCS-MXi options for VHDL Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vhdlan -work   

#

OPTION:vcs_mx:vhdl:u:-nc

OPTION:vcs_mx:vhdl:s:-nc

OPTION:vcs_mx:vhdl:c:-nc

OPTION:vcs_mx:vhdl:m:-nc

OPTION:vcs_mx:vhdl:a:-nc

OPTION:vcs_mx:vhdl:r:-nc

#

# VCS-MX options for VERILOG Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vcs  -Mdir= -y  +libext+.v 

#

OPTION:vcs_mx:verilog:u:-Mupdate +v2k

OPTION:vcs_mx:verilog:s:-Mupdate +v2k

OPTION:vcs_mx:verilog:n:-Mupdate +v2k

OPTION:vcs_mx:verilog:c:-Mupdate +v2k

OPTION:vcs_mx:verilog:m:-lmc-swift -Mupdate +v2k

OPTION:vcs_mx:verilog:a:-Mupdate +v2k

OPTION:vcs_mx:verilog:r:-Mupdate +v2k

#

# VCS-MXi options for VERILOG Libraries

# Syntax:-

# OPTION::::

#  :- u (unisim) s (simprim) c (xilinxcorelib)

#              m (smartmodel) a (abel) r (coolrunner)

# vcsi  -Mdir= -y  +libext+.v 

#

OPTION:vcs_mxi:verilog:u:-Mupdate +v2k

OPTION:vcs_mxi:verilog:s:-Mupdate +v2k

OPTION:vcs_mxi:verilog:n:-Mupdate +v2k

OPTION:vcs_mxi:verilog:c:-Mupdate +v2k

OPTION:vcs_mxi:verilog:m:-lmc-swift -Mupdate +v2k

OPTION:vcs_mxi:verilog:a:-Mupdate +v2k

OPTION:vcs_mxi:verilog:r:-Mupdate +v2k

#///////////////////////////////////////////////////////////////////////

# End