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[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-ip/] [core/] [coregenerator/] [coregenerator_fifo_dualclock_readme.txt] - Blame information for rev 25

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1 24 nussgipfel
The following files were generated for 'coregenerator_fifo_dualclock' in directory
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/home/chrigi/bfh-work/GECKO3COM/gecko3com-ip/core/coregenerator/
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coregenerator_fifo_dualclock.asy:
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   Graphical symbol information file. Used by the ISE tools and some
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   third party tools to create a symbol representing the core.
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coregenerator_fifo_dualclock.gise:
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   ISE Project Navigator support file. This is a generated file and should
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   not be edited directly.
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coregenerator_fifo_dualclock.ise:
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   ISE Project Navigator support file. This is a generated file and should
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   not be edited directly.
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coregenerator_fifo_dualclock.ndf:
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   Optional output file produced for cores that generate NGC files.
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   The NDF files allow third party synthesis tools to infer resource
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   utilization and timing from the NGC files associated with these new
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   cores.
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coregenerator_fifo_dualclock.ngc:
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   Binary Xilinx implementation netlist file containing the information
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   required to implement the module in a Xilinx (R) FPGA.
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coregenerator_fifo_dualclock.sym:
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   Please see the core data sheet.
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coregenerator_fifo_dualclock.v:
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   Verilog wrapper file provided to support functional simulation.
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   This file contains simulation model customization data that is
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   passed to a parameterized simulation model for the core.
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coregenerator_fifo_dualclock.veo:
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   VEO template file containing code that can be used as a model for
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   instantiating a CORE Generator module in a Verilog design.
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coregenerator_fifo_dualclock.vhd:
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   VHDL wrapper file provided to support functional simulation. This
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   file contains simulation model customization data that is passed to
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   a parameterized simulation model for the core.
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coregenerator_fifo_dualclock.vho:
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   VHO template file containing code that can be used as a model for
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   instantiating a CORE Generator module in a VHDL design.
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coregenerator_fifo_dualclock.xco:
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   CORE Generator input file containing the parameters used to
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   regenerate a core.
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coregenerator_fifo_dualclock.xise:
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   ISE Project Navigator support file. This is a generated file and should
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   not be edited directly.
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coregenerator_fifo_dualclock_flist.txt:
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   Text file listing all of the output files produced when a customized
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   core was generated in the CORE Generator.
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coregenerator_fifo_dualclock_padded.ngc:
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   Binary Xilinx implementation netlist. The logic implementation of
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   certain CORE Generator IP is described by a combination of a top
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   level EDN file plus one or more NGC files.
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coregenerator_fifo_dualclock_readme.txt:
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   Text file indicating the files generated and how they are used.
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coregenerator_fifo_dualclock_xmdf.tcl:
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   ISE Project Navigator interface file. ISE uses this file to determine
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   how the files output by CORE Generator for the core can be integrated
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   into your ISE project.
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Please see the Xilinx CORE Generator online help for further details on
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generated files and how to use them.
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