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%%           Bern University of Applied Sciences (BFH)                        %%
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%%           Quellgasse 21                                                    %%
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%%           Room HG 4.33                                                     %%
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%%           2501 Biel/Bienne                                                 %%
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%%           Switzerland                                                      %%
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%%           http://www.microlab.ch                                           %%
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\chapter{Implemented Commands}
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\label{chap:commands}
19
The {\sc GECKO4com} implements 36 {\sc SCPI} commands as shown in
20
Table~\ref{tab:scpi commands}. The commands starting with a \verb+*+ are
21
compliant with the IEEE488.1~\cite{ieee488_1} and IEEE488.2~\cite{ieee488_2}
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standards and will not be described in this chapter. The exception to the above
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is the description of the \verb+*PUD+, \verb+*PUD?+ and \verb+*RST+ commands.
24
\begin{table}[hb]
25
\begin{tabular}{|l|l|l|l|}
26
\hline
27
\verb+*CLS+&\verb+*ESE+&\verb+*ESE?+&\verb+*ESR?+\\
28
\hline
29
\verb+*IDN?+&\verb+*IST?+&\verb+*OPC+&\verb+*OPC?+\\
30
\hline
31
\verb+*PUD+&\verb+*PUD?+&\verb+*RST+&\verb+*SRE+\\
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\hline
33
\verb+*SRE?+&\verb+*STB?+&\verb+*TST?+&\verb+*WAI+\\
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\hline
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\verb+BITFLASH+&\verb+BITFLASH?+&\verb+BOARD?+&\verb+CONFIG+\\
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\hline
37
\verb+ERASE+&\verb+FIFO+&\verb+FIFO?+&\verb+FPGA+\\
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\hline
39
\verb+FPGA?+&\verb+HEXSWITCH+&\verb+HEXSWITCH?+&\verb+IDENTIFY+\\
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\hline
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\verb+TRANS+&\verb+USERRESET+&\verb+VGA:BGCOL+&\verb+VGA:CLEAR+\\
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\hline
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\verb+VGA:CURSOR+&\verb+VGA:CURSOR?+&\verb+VGA:FGCOL+&\verb+VGA:PUTSTR+\\
44
\hline
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\end{tabular}
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\caption{{\sc SCPI} commands implemented in the {\sc GECKO4com}}
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\label{tab:scpi commands}
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\end{table}
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%-----------------------------------------------------------------------------
50
\section{Protected User Data}
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\label{sec: PUD}
52
The IEEE488.1~\cite{ieee488_1} and IEEE488.2~\cite{ieee488_2} standards describe
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the \verb+*PUD+ and \verb+*PUD?+ as optional commands. These two commands
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provide a Protected User Data (PUD) area of at least 63 bytes. The {\sc GECKO4com}
55
implements a PUD of 2048 bytes and violates the standard in the protection
56
requirement.\\
57
 \\
58
\textbf{Reading the PUD area:}\\
59
When executing the \verb+*PUD?+ command the {\sc GECKO4com} puts the contents of
60
the complete PUD memory (2048 bytes) in the output queue. The PUD memory can
61
only be read completely; there exist no possibility to read only a part of it.\\
62
 \\
63
\textbf{Writing the PUD area:}\\
64
The PUD area can be written with the \verb*+*PUD <payload>+ command. The number
65
of spaces (\verb*+ +) between the command and the payload must be exactly
66
one. All the other spaces are interpreted as payload. The size of
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the payload can be anywhere between 1 and 2048 bytes. Upon receiving this
68
command the {\sc GECKO4com} will start writing at address 0 of the PUD memory.
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If the payload size is more than 2048 bytes the {\sc GECKO4com} will wrap around
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and overwrite earlier written data. After having received the payload, the {\sc
71
GECKO4com} will store the complete 2048 bytes of the PUD memory in an external
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attached flash.\\
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\textit{Note:  If there is no Flash chip mounted on the {\sc GECKO4main}, the
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PUD memory area will become volatile.\note}\\
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\textit{Important: Each execution of the} \verb+*PUD+ \textit{command will initiate a
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sector erase/program cycle of the attached Flash chip; therefore, the number of
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the} \verb+*PUD+ \textit{command invocation is limited by the number of
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sector erase cycles specified by the Flash chip manufacturer.\important}\\
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 \\
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\textbf{PUD memory organization:}\\
81
The PUD memory organization is shown in Figure~\ref{fig:PUD mem org}.
82
\begin{figure}
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\centering%
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\includegraphics[width=0.7\columnwidth]{figs/pud_memory_org}
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\caption{Memory organization of the PUD area. The memory is continues; the
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64-byte blocks are only shown to indicate the thirteen ASCII lines.}
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\label{fig:PUD mem org}
88
\end{figure}
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The area between \verb+0x000+ and \verb+0x4BF+ is completely user definable;
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however the area between \verb+0x4C0+ and \verb+0x7FF+ is used to store thirteen
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lines of sixty four ASCII characters that are displayed in the Static User Window
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 (SUW) of the VGA-controller (see Chapter~\ref{sec: vga}).\\
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  \\
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\textbf{PUD command error handling:}\\
95
Both the \verb+*PUD+ and \verb+*PUD?+ are always executed successfully; therefore
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there is no command error generated for either of these commands.
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%-----------------------------------------------------------------------------
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\section{Global Reset}
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The {\sc GECKO4com} provides the means to activate the Global Reset. It is
100
important to not confuse the Global Reset with the User Reset as described in
101
Chapter~\ref{chap:user_reset}. The {\sc GECKO4com} activates the Global Reset by
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pulling the signal actively low. In case of a deactivated Global Reset, the
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{\sc GECKO4com} leaves this pin floating. No pull-up on this signal is provided
104
by the {\sc GECKO4com}. For more details on the requirements of the Global Reset
105
(GR) signal please refer to the {\sc GECKO4main} technical reference
106
guide~\cite{gecko4main}.\\
107
 \\
108
\textbf{GR activation:}\\
109
There are two situations for which the {\sc GECKO4com} activates the Global
110
Reset line, namely:
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\begin{enumerate}
112
\item \textbf{Unconfigured FPGA:} If the user FPGA on the {\sc GECKO4main} is
113
not configured the Global Reset line is kept activate.
114
In case no user FPGA is mounted, the the Global Reset line is deactivated.
115
\item \textbf{Reset command:} By executing the \verb+*RST+ command, the Global
116
Reset line is activated for a period between 10~ms and 11~ms.
117
\end{enumerate}
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\textit{Important: The {\sc GECKO4com} is uneffected by the state of the Global Reset
119
line.\important}\\
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 \\
121
\textbf{GR command error handling:}\\
122
The \verb+*RST+ command always executes correctly; therefore there is no command
123
error generated for this command.
124
%-----------------------------------------------------------------------------
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\section{User Reset}
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\label{chap:user_reset}
127
Contrary to the Global Reset signal the User Reset signal is only connected to
128
the user FPGA on the {\sc GECKO4main}. This User Reset signal provides the means
129
of resetting the logic inside the user FPGA without effecting attached
130
boards. The User Reset (UR) signal is an \emph{active low} signal that is actively
131
driven for both a \verb+1+ and a \verb+0+. The User Reset signal is connected to
132
pin \textbf{Y9} of the user FPGA.\\
133
 \\
134
\textbf{UR activation:}\\
135
There are two situations for which the User Reset line is activated, namely:
136
\begin{enumerate}
137
\item \textbf{Unconfigured FPGA:} If the user FPGA on the {\sc GECKO4main} is
138
not configured the User Reset line is kept activate up to a period of 10~ms to
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11~ms after the done line of the user FPGA went high.
140
In case no user FPGA is mounted, the User Reset line is deactivated.
141
\item \textbf{Reset command:} By executing the \verb+USERRESET+ command, the
142
User Reset line is activated for a period between 10~ms and 11~ms.
143
\end{enumerate}
144
\textit{Important: The {\sc GECKO4com} is uneffected by the state of the User Reset
145
line.\important}\\
146
\textit{Important: The User Reset line is uneffected by the state of the Global
147
Reset line.\important}\\
148
 \\
149
\textbf{UR command error handling:}\\
150
The \verb+USERRESET+ command always executes correctly; therefore there is no command
151
error generated for this command.
152
%-----------------------------------------------------------------------------
153
\section{Bitfile Storage}
154
To be able to operate the {\sc GECKO4main} in an environment where a USB
155
connection is not wanted, the {\sc GECKO4com} provides the means to store the
156
user FPGAs configuration in a non-volatile memory. The user FPGAs configuration,
157
further referred to as \emph{bitfile}, is generated by the Xilinx toolchain and
158
consists of a variable length header and the configuration data in form of a
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bitstream~\cite{FPGAFAQ_0026}. The {\sc GECKO4com} provides four commands to
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manipulate the bitfile storage.
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\begin{itemize}
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\item \verb*+BITFLASH <bitfile>+. This command stores the \verb+<bitfile>+ in
163
the non-volatile memory of the {\sc GECKO4com}. This command can take upto two
164
seconds to complete due to the speed of the non-volatile memory. This command
165
is only succesfull in case of an empty non-volatile memory, otherwise an
166
execution error is generated.\\
167
\textit{Important: (1) The {\sc GECKO4com} does not control if the provided
168
bitfile is suitable for the mounted user FPGA and
169
(2) only a single space (}\verb*+ +\textit{)  must be provided between the command and
170
the bitfile.}
171
\item \verb+CONFIG+. This command configures the user FPGA with the bitfile
172
stored in the non-volatile memory. If the non-volatile memory does not contain a
173
bitfile an execution error is generated.
174
\item \verb+ERASE+. This command erases the non-volatile memory and must be
175
provided before the programming of a new bitfile into the non-volatile memory.
176
This command can take several seconds to complete.
177
\item \verb+BITFLASH?+. This command returns \verb+EMPTY+ if the non-volatile
178
memory is empty, and the stored bitfile otherwise.
179
\end{itemize}
180
\textit{Note: It is highly discouraged to use the }\verb+BITFLASH <bitfile>+
181
\textit{ and }
182
\verb+ERASE+ \textit{ commands in a script due to their execution time. Most likely a
183
time-out error is generated on the USBTMC protocol due to these execution
184
times. \note}
185
%-----------------------------------------------------------------------------
186
\section{{\sc GECKO4main} information}
187
\label{sec: main info}
188
The {\sc GECKO4com} provides two commands to report the current status of the
189
{\sc GECKO4main} system. Both these commands always execute successfully and
190
return an ASCII string.
191
\begin{itemize}
192
\item \verb+FPGA?+. This command returns the detected user FPGA type and its
193
configuration state. Possible user FPGAs are listed in the {\sc GECKO4main}
194
Technical Reference Manual~\cite{gecko4main}. If no user FPGA is
195
mounted or the {\sc GECKO4com} was unable to determine the FPGA type this
196
command returns the message \emph{No FPGA mounted or unknown FPGA type} and all
197
user FPGA manipulations are prohibited.
198
\item \verb+BOARD?+. This command returns the powering status, e.g. USB
199
supplied, GENIO1 supplied, powering BUS, of the {\sc GECKO4main} and the status
200
of the {\sc GECKO4com}'s non-volatile memory (empty or programmed) [see previous
201
section].
202
\end{itemize}
203
Furthermore the {\sc GECKO4com} provides the means of identifying optically an
204
attached {\sc GECKO4main} by means of the command \verb+IDENTIFY+. After
205
execution of this command the eight LEDs of {\sc GECKO4main} will start to
206
become red, afterwards they change to green and finally they will go off one
207
after the other. This sequence lasts for approximately one second.
208
%-----------------------------------------------------------------------------
209
\section{User FPGA configuration}
210
The {\sc GECKO4com} provides the means to configure the user FPGA. This
211
configuration is independent of the current state of the user FPGA. This means
212
that the user FPGA can be configured as many times as required and with as many
213
bitfiles as wanted. By this flexibility of the {\sc GECKO4com} progression
214
testing and scripted simulations/emulations. The configuration time for even the
215
largest Spartan 3 5000 FPGA is only a few tens of milliseconds.
216
 
217
The command to configure the user FPGA is \verb*+FPGA <bitfile>+. This command
218
\textbf{must} only contain one space (\verb*+ +). In case no user FPGA is
219
mounted or the {\sc GECKO4com} was unable to detect the mounted user FPGA  this
220
command will generate an execution error.\\
221
\textit{Important: The {\sc GECKO4com} does not control if the provided bitfile
222
is suitable for the mounted user FPGA. It is up to the user to make sure that
223
the bitfile that is uploaded is generated for the correct user FPGA type. In
224
case a wrong bitfile is uploaded the command will execute successfully; however
225
the user FPGA will refuse to load it. To be able to see if the user FPGA has
226
been configured correctly the }\verb+FPGA?+\textit{ command can be used to ask
227
the current status if the user FPGA. \important}
228
%-----------------------------------------------------------------------------
229
\section{Mechanical Switch}
230
\label{sec: hexswitch}
231
The {\sc GECKO4main} provides a hexadecimal encoded switch that is further
232
referred to as \emph{hexswitch}. The {\sc GECKO4com} provides two commands to
233
manipulate this switch.
234
\begin{itemize}
235
\item \verb*+HEXSWITCH <value>+. This command overrides the mechanical switch and
236
forces the \verb+<value>+ to appear on both the user FPGA side (see
237
Chapter~\ref{sec:mem map}) as well as from the PC side. The parameter
238
\verb+<value>+ can be any of the set [0-9,A-F,a-f]. Between the command and the
239
parameter \verb+<value>+ there may be as many spaces (\verb*+ +) as wanted. This
240
command executes successfully as long as the parameter \verb+<value>+ is in the
241
set mentioned before. This command is persistent until either the board is
242
powered, or an \verb+INITIATE_CLEAR+ USBTMC message~\cite{usbtmc} is send. This
243
command may be send as often as required and will each time override the
244
previous value send.
245
\item \verb+HEXSWITCH?+. This command reports the current state of the hexswitch
246
or the override value if a \verb+HEXSWITCH+ command has been issued before this
247
command. The result of this command is an ASCII character of the set [0-9,A-F]
248
followed by a new-line character (\verb+0x0A+).
249
\end{itemize}
250
%-----------------------------------------------------------------------------
251
\section{User FPGA communication}
252
The {\sc GECKO4com} provides three commands that allows for communication
253
between the PC and the user FPGA. These commands are \verb+FIFO+, \verb+FIFO?+,
254
and \verb+TRANS+. More information on these commands and the protocols involved
255
can be found in Chapter~\ref{chap:fpga}.
256
%-----------------------------------------------------------------------------
257
\section{VGA controller}
258
\label{sec: vga commands}
259
The {\sc GECKO4com} provides a VGA controller not only for debug purposes but
260
also for demonstration purposes. The VGA controller implemented in the {\sc
261
GECKO4com} has one USBTMC window (see Chapter~\ref{sec: vga} for further
262
information). The commands to manipulate this window are listed below.
263
\begin{itemize}
264
\item \verb*+VGA:FGCOL <value>+. This command sets the forground color of the
265
VGA window. The parameter \verb+<value>+ can be any character between \verb+0+
266
and \verb+7+ (see also Chapter~\ref{sec: vga}).
267
\item \verb*+VGA:BGCOL <value>+. This command sets the background color of the
268
VGA window. The parameter \verb+<value>+ can be any character between \verb+0+
269
and \verb+7+ (see also Chapter~\ref{sec: vga}).
270
\item \verb+VGA:CLEAR+. This command clears the VGA window and puts the cursor
271
on the left top position of the screen.
272
\item \verb+VGA:CURSOR?+. This command returns the current cursor position. The
273
format returned is a string in the form \verb+<x>,<y>+ where
274
$\text{x}\in[0..63]$ and $\text{y}\in[0..31]$.
275
\item \verb*+VGA:CURSOR <x>,<y>+. This command sets the current cursor position
276
to (x,y). The parameters: $\text{x}\in[0..63]$ and $\text{y}\in[0..31]$.\\
277
\textit{Note: The parameters x and y must be specified as ASCII characters and
278
not as bytes, e.g. 31 equals the character ``3'' (0x33) followed by the
279
character ``1'' (0x31).\note}
280
\item \verb*+VGA:PUTSTR <string>+. This command displays all the bytes following
281
the space (\verb*+ +) at the current cursor position on the VGA window as ASCII
282
characters. A new-line character (\verb+0x0A+) will forse a new line and all
283
bytes with a value smaller than the ASCII character space (\verb+0x20+) will be
284
ignored.\\
285
\textit{Important: No commands can be concatinated with this command. Doing so
286
will ``print'' them on the VGA screen rather than executing them.\important}
287
\end{itemize}
288
%-----------------------------------------------------------------------------
289
\section{The Status Byte Register}
290
\label{sec: SBR}
291
The IEEE488.1~\cite{ieee488_1} and IEEE488.2~\cite{ieee488_2} standards define
292
an obligatory status byte register as shown in Figure~11-8 in the
293
IEEE488.2~\cite{ieee488_2} standard. The {\sc GECKO4com} implements this
294
register with the obligatory \emph{MSS}, \emph{ESB}, and \emph{MAV} bits.
295
Besides from these obligatory bits, the {\sc GECKO4com} implements 2 extra
296
status bits.
297
\begin{itemize}
298
\item \textbf{Bit 3.} Bit 3 in the Status Byte Register indicates when \verb+1+
299
that the user FPGA is configured and running. When this bit is \verb+0+ the user
300
FPGA is either not present or not configured.
301
\item \textbf{Bit 2.} Bit 2 in the Status Byte Register indicates when \verb+1+
302
that the {\sc GECKO4com} is in \emph{transparent mode} (see Chapter~\ref{sec:trans mode}).
303
When this bit is \verb+0+ the {\sc GECKO4com} is in normal operation mode.
304
\end{itemize}
305
If the {\sc GECKO4com} is in \emph{transparent mode} it does only supply the
306
\emph{MSS} bit, the \emph{MAV} bit, and the transparent bit (bit 2) of the
307
Status Byte Register. It is left to the user FPGA to provide the following bits:
308
\begin{itemize}
309
\item \textbf{Bit 7 (ESB).} In \emph{transparent mode} the user FPGA {\sc must}
310
provide the \emph{ESB} bit. This bit is at pin \verb+AE6+ of the user FPGA and
311
of type {\sc lvcmos25}.
312
\item \textbf{Bit 3.} In \emph{transparent mode} this bit is user definable by
313
the user FPGA. This bit is at pin \verb+AE8+ of the user FPGA and of type {\sc
314
lvcmos25}.
315
\end{itemize}
316
For the user FPGA to know if the {\sc GECKO4com} is in \emph{transparent mode},
317
the pin \verb+AD6+ at the user FPGA is a copy of bit 2 in the Status Byte
318
Register. Figure~\ref{fig:stb} shows the Status Byte Register as provided by the
319
{\sc GECKO4com}.
320
\begin{figure}[t]
321
\centering%
322
\includegraphics[width=0.8\columnwidth]{figs/status_byte_register}
323
\caption{The Status Byte Register as defined by the {\sc GECKO4com}.}
324
\label{fig:stb}
325
\end{figure}
326
%-----------------------------------------------------------------------------
327
\def\srt#1{}
328
\begin{thebibliography}{10}
329
\bibitem{FPGAFAQ_0026}
330
Alan Nishioka and Philip Freidin,
331
\newblock{\em FPGA-FAQ 0026---{T}ell me about the .{BIT} file format.}
332
\newblock \verb+www.fpga-faq.com+, Nov. 2001
333
 
334
\bibitem{gecko4main}
335
Dr. Theo Kluter,
336
\newblock{\em {\sc GECKO4main} {T}echnical {R}eference {M}anual.}
337
\newblock Bern University of Applied Sciences, Biel/Bienne, Switzerland, 2011.
338
 
339
\bibitem{ieee488_1}
340
IEEE, Inc.
341
\newblock{\em {IEEE} {S}tandard {C}odes, {F}ormats, {P}rotocols, and
342
{C}ommon {C}ommands for {U}se {W}ith {IEEE} {S}td 488.1-1987, {IEEE}
343
{S}tandard {D}igital {I}nterface for {P}rogrammable {I}nstrumentation.}
344
\newblock ISBN 1-55937-238-9, New York, 1992.
345
 
346
\bibitem{ieee488_2}
347
IEC and IEEE.
348
\newblock{\em {IEC} 60488-2, {IEEE} 488.2: {S}tandard digital interface for
349
programmable instrumentation --- {P}art 2: {C}odes, formats, protocols and
350
common commands.}
351
\newblock First edition, 2005-05.
352
 
353
\bibitem{usbtmc}
354
USB Implementers Forum, Inc.
355
\newblock{\em {U}niversal {S}erial {B}us {T}est and {M}easurement {C}lass
356
{S}pecification ({USBTMC})--{R}evision 1.0.}
357
\newblock April, 2003
358
\end{thebibliography}

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