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--------------------------------------------------------------------------------
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-- _ _ __ ____ --
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-- / / | | / _| | __| --
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-- | |_| | _ _ / / | |_ --
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-- | _ | | | | | | | | _| --
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-- | | | | | |_| | \ \_ | |__ --
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-- |_| |_| \_____| \__| |____| microLab --
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-- --
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-- Bern University of Applied Sciences (BFH) --
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-- Quellgasse 21 --
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-- Room HG 4.33 --
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-- 2501 Biel/Bienne --
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-- Switzerland --
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-- --
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-- http://www.microlab.ch --
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--------------------------------------------------------------------------------
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-- GECKO4com
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--
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-- 2010/2011 Dr. Theo Kluter
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--
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-- This VHDL code is free code: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This VHDL code is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with these sources. If not, see <http://www.gnu.org/licenses/>.
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--
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ARCHITECTURE spartan3 OF idreg_rom IS
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BEGIN
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make_data : PROCESS( index )
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BEGIN
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CASE (index) IS
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WHEN "00000" => data <= X"00";
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WHEN "00001" => data <= X"00";
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WHEN "00010" => data <= X"00";
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WHEN "00011" => data <= X"00";
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WHEN "00100" => data <= X"00";
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WHEN "00101" => data <= X"00";
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WHEN "00110" => data <= X"00";
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WHEN "00111" => data <= X"00";
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WHEN "01000" => data <= X"02";
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WHEN "01001" => data <= X"C0";
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WHEN "01010" => data <= X"01";
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WHEN "01011" => data <= X"28";
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WHEN "01100" => data <= X"66";
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WHEN "01101" => data <= X"55";
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WHEN "01110" => data <= X"99";
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WHEN "01111" => data <= X"AA";
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WHEN OTHERS => data <= X"FF";
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END CASE;
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END PROCESS make_data;
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END spartan3;
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