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[/] [generic_booth_multipler/] [trunk/] [rtl/] [modules/] [01.BoothController.vhd] - Blame information for rev 2

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1 2 alimpk
library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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entity BoothController is
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  Port (
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    clock     : in  std_logic;
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    reset     : in  std_logic;
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    start     : in  std_logic;
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    interrupt : in  std_logic;
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    load      : out std_logic;
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    shift     : out std_logic;
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    cnt_clear : out std_logic;
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    reg_clear : out std_logic;
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    ready     : out std_logic);
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end BoothController;
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architecture Behavioral of BoothController is
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  type state_t is (reset_st,reset_and_load_st,calculating_st, calculated_st, done_st);
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  signal current_state : state_t := reset_st;
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  signal next_state : state_t := reset_st;
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begin
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  process(clock, reset)
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  begin
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    if(reset = '1') then
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        current_state <= reset_st;
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    elsif (rising_edge(clock)) then
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        current_state <= next_state;
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    end if;
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  end process;
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  process(current_state, start, interrupt)
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  begin
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    load <= '0';
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    shift <= '0';
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    cnt_clear <= '0';
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    reg_clear <= '0';
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    case current_state is
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      when  reset_st =>
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        if(start = '1') then
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            load <= '1';
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            reg_clear <= '1';
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            next_state <= reset_and_load_st;
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        else
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            next_state <= reset_st;
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        end if;
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      when  reset_and_load_st =>
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          shift <= '1';
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          cnt_clear <= '1';
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          next_state <= calculating_st;
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      when  calculating_st =>
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          if(interrupt = '1') then
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              next_state <= calculated_st;
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          else
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              shift <= '1';
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              next_state <= calculating_st;
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          end if;
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      when calculated_st =>
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          next_state <= done_st;
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      when done_st =>
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          next_state <= done_st;
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    end case;
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   end process;
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  ready <= '1' when current_state = done_st else '0';
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end Behavioral;

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