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<a href="#Components">Components</a> &#124;
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Inheritance diagram for struct:</div>
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<table class="memberdecls">
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<br/>
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<br/>
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<tr><td colspan="2"><h2><a name="pub-attribs"></a>
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Components</h2></td></tr>
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a6f9e1a961a64ab0041ac0707ee40c821">multiplier_gen</a>&#160;</td><td class="memItemRight" valign="bottom"><b></b>  <em><a class="el" href="classmultiplier__gen.html">&lt;Entity multiplier_gen&gt; </a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab3cadb9f82a00f0361b33c19dff6ae52"></a><!-- doxytag: member="fir_filter_stage_TF::struct::adder_gen" ref="ab3cadb9f82a00f0361b33c19dff6ae52" args="" -->
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#ab3cadb9f82a00f0361b33c19dff6ae52">adder_gen</a>&#160;</td><td class="memItemRight" valign="bottom"><b></b>  <em><a class="el" href="classadder__gen.html">&lt;Entity adder_gen&gt; </a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a924bfda8c3c384807bfb8ae15d7953ba"></a><!-- doxytag: member="fir_filter_stage_TF::struct::delay_gen" ref="a924bfda8c3c384807bfb8ae15d7953ba" args="" -->
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a924bfda8c3c384807bfb8ae15d7953ba">delay_gen</a>&#160;</td><td class="memItemRight" valign="bottom"><b></b>  <em><a class="el" href="classdelay__gen.html">&lt;Entity delay_gen&gt; </a></em></td></tr>
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<tr><td colspan="2"><h2><a name="pub-attribs"></a>
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Constants</h2></td></tr>
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#adaa2b6c5cbc1def261e9acc0c3c7007c">width_in</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">natural</span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><b><a class="el" href="classfir__filter__stage__TF.html#ab508794e1ce35c2946d28703f4ebca9f">fir_in</a></b> <span class="vhdlchar"> </span><span class="vhdlchar">'</span><span class="vhdlchar"> </span><span class="vhdlchar">length</span><span class="vhdlchar"> </span></b></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Input bit-width. <br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a339f911ca5cb1a8748960755c77bc225"></a><!-- doxytag: member="fir_filter_stage_TF::struct::width_const" ref="a339f911ca5cb1a8748960755c77bc225" args="" -->
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a339f911ca5cb1a8748960755c77bc225">width_const</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">positive</span><span class="vhdlchar"> </span><span class="vhdlchar">:</span><span class="vhdlchar">=</span><span class="vhdlchar"> </span><b><a class="el" href="classfir__pkg.html#a9412e753e9f662ae363ff33d552c55ce">quantization</a></b> <span class="vhdlchar"> </span></b></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Quantization bit-width defined in the <a class="el" href="fir__pkg_8vhd.html" title="This is the supporting package. &quot;JUST EDIT THIS FILE&quot;.">fir_pkg.vhd</a>. <br/></td></tr>
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<tr><td colspan="2"><h2><a name="pub-attribs"></a>
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Signals</h2></td></tr>
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a4205437c41382c6434ab00bb83e1a3f7">multi_add</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">order</span><span class="vhdlchar">-</span><span class="vhdldigit">1</span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar">*</span><span class="vhdlchar">width_out</span><span class="vhdlchar">-</span><span class="vhdldigit">1</span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdldigit">0</span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal signal holding multiplier's outputs and adder's inputs. <br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a862700b81c83534570de1c1c8febd189"></a><!-- doxytag: member="fir_filter_stage_TF::struct::add_delay" ref="a862700b81c83534570de1c1c8febd189" args="" -->
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a862700b81c83534570de1c1c8febd189">add_delay</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">order</span><span class="vhdlchar">-</span><span class="vhdldigit">2</span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar">*</span><span class="vhdlchar">width_out</span><span class="vhdlchar">-</span><span class="vhdldigit">1</span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdldigit">0</span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal signal holding adder's outputs and delay's inputs. <br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="af0bb5234fc4334060df784c2d6bcd6eb"></a><!-- doxytag: member="fir_filter_stage_TF::struct::delay_add" ref="af0bb5234fc4334060df784c2d6bcd6eb" args="" -->
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#af0bb5234fc4334060df784c2d6bcd6eb">delay_add</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">order</span><span class="vhdlchar">-</span><span class="vhdldigit">1</span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span><span class="vhdlchar">*</span><span class="vhdlchar">width_out</span><span class="vhdlchar">-</span><span class="vhdldigit">1</span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdldigit">0</span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal signal holding delay's output and adder's inputs. <br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6fb55cb2f3a509091c7a3a04d9fe844f"></a><!-- doxytag: member="fir_filter_stage_TF::struct::multi_delay" ref="a6fb55cb2f3a509091c7a3a04d9fe844f" args="" -->
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<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a6fb55cb2f3a509091c7a3a04d9fe844f">multi_delay</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="comment">std_logic_vector</span><span class="vhdlchar"> </span><span class="vhdlchar">(</span><span class="vhdlchar"> </span><span class="vhdlchar">width_out</span><span class="vhdlchar">-</span><span class="vhdldigit">1</span><span class="vhdlchar"> </span><span class="vhdlkeyword">downto</span><span class="vhdlchar"> </span><span class="vhdldigit">0</span><span class="vhdlchar"> </span><span class="vhdlchar">)</span><span class="vhdlchar"> </span></b></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">internal signal for the left most multiplier since it is connected directly to delay <br/></td></tr>
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<tr><td colspan="2"><h2><a name="pub-attribs"></a>
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Component Instantiations</h2></td></tr>
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 <tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="abd4c2cf4810e81ae22a38305fd433e1a"></a><!-- doxytag: member="fir_filter_stage_TF::struct::MULTI" ref="abd4c2cf4810e81ae22a38305fd433e1a" args="" -->
129 
<a class="el" href="classfir__filter__stage__TF_1_1struct.html#abd4c2cf4810e81ae22a38305fd433e1a">MULTI</a>&#160;</td><td class="memItemRight" valign="bottom"><b>multiplier_gen</b>  <em><a class="el" href="classmultiplier__gen.html">&lt;Entity multiplier_gen&gt;</a></em></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate the filter multipliers set. <br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5ec8e2ec5fae2030c1304157beece49f"></a><!-- doxytag: member="fir_filter_stage_TF::struct::MULTIs" ref="a5ec8e2ec5fae2030c1304157beece49f" args="" -->
132 
<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a5ec8e2ec5fae2030c1304157beece49f">MULTIs</a>&#160;</td><td class="memItemRight" valign="bottom"><b>multiplier_gen</b>  <em><a class="el" href="classmultiplier__gen.html">&lt;Entity multiplier_gen&gt;</a></em></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ab73297ef7e9ada93294ea90b438e5c38"></a><!-- doxytag: member="fir_filter_stage_TF::struct::LastDELAY" ref="ab73297ef7e9ada93294ea90b438e5c38" args="" -->
134 
<a class="el" href="classfir__filter__stage__TF_1_1struct.html#ab73297ef7e9ada93294ea90b438e5c38">LastDELAY</a>&#160;</td><td class="memItemRight" valign="bottom"><b>delay_gen</b>  <em><a class="el" href="classdelay__gen.html">&lt;Entity delay_gen&gt;</a></em></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate the filter delays set. <br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a608b6f687e967f2a2f299ff0e0054186"></a><!-- doxytag: member="fir_filter_stage_TF::struct::DELAYs" ref="a608b6f687e967f2a2f299ff0e0054186" args="" -->
137 
<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a608b6f687e967f2a2f299ff0e0054186">DELAYs</a>&#160;</td><td class="memItemRight" valign="bottom"><b>delay_gen</b>  <em><a class="el" href="classdelay__gen.html">&lt;Entity delay_gen&gt;</a></em></td></tr>
138 
<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a0b2df459bab2f96d35693f23aa035b85"></a><!-- doxytag: member="fir_filter_stage_TF::struct::ADDER0" ref="a0b2df459bab2f96d35693f23aa035b85" args="" -->
139 
<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a0b2df459bab2f96d35693f23aa035b85">ADDER0</a>&#160;</td><td class="memItemRight" valign="bottom"><b>adder_gen</b>  <em><a class="el" href="classadder__gen.html">&lt;Entity adder_gen&gt;</a></em></td></tr>
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<tr><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate the filter adders set. <br/></td></tr>
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<tr><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a6f5117e2d020b31913e8fe1f794fe13d"></a><!-- doxytag: member="fir_filter_stage_TF::struct::ADDERs" ref="a6f5117e2d020b31913e8fe1f794fe13d" args="" -->
142 
<a class="el" href="classfir__filter__stage__TF_1_1struct.html#a6f5117e2d020b31913e8fe1f794fe13d">ADDERs</a>&#160;</td><td class="memItemRight" valign="bottom"><b>adder_gen</b>  <em><a class="el" href="classadder__gen.html">&lt;Entity adder_gen&gt;</a></em></td></tr>
143 
</table>
144 
<hr/>The documentation for this class was generated from the following file:<ul>
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<li>src/<a class="el" href="fir__filter__stage__TF_8vhd.html">fir_filter_stage_TF.vhd</a></li>
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