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[/] [gpib_controller/] [trunk/] [prototype_1/] [PC_software/] [gpib_src/] [GpibRegAccess_linux.c] - Blame information for rev 12

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Line No. Rev Author Line
1 3 Andrewski
/*
2 12 Andrewski
*This file is part of fpga_gpib_controller.
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*
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* Fpga_gpib_controller is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Fpga_gpib_controller is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Fpga_gpib_controller.  If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
18 3 Andrewski
 * RegAccess_linux.c
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 *
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 *  Created on: 2012-01-28
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 *      Author: Andrzej Paluch
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 */
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#include <string.h>
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#include <unistd.h>
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#include <termios.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include "GpibRegAccess.h"
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#define HND(handle) ((int)handle)
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void GpibRegAccess_setFlags(int fd, SizeType dataLength)
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{
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        struct termios settings;
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        memset(&settings, 0, sizeof(settings));
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        settings.c_cflag = B921600 | CS8 | CLOCAL;
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        //settings.c_lflag = IGNPAR;
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        settings.c_cc[VINTR]    = 0;     /* Ctrl-c */
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        settings.c_cc[VQUIT]    = 0;     /* Ctrl-\ */
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        settings.c_cc[VERASE]   = 0;     /* del */
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        settings.c_cc[VKILL]    = 0;     /* @ */
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        settings.c_cc[VEOF]     = 0;     /* Ctrl-d */
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        settings.c_cc[VTIME]    = 0;     /* inter-character timer unused */
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        /* blocking read until "dataLength" characters arrives */
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        settings.c_cc[VMIN]     = dataLength;
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        settings.c_cc[VSWTC]    = 0;     /* '\0' */
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        settings.c_cc[VSTART]   = 0;     /* Ctrl-q */
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        settings.c_cc[VSTOP]    = 0;     /* Ctrl-s */
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        settings.c_cc[VSUSP]    = 0;     /* Ctrl-z */
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        settings.c_cc[VEOL]     = 0;     /* '\0' */
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        settings.c_cc[VREPRINT] = 0;     /* Ctrl-r */
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        settings.c_cc[VDISCARD] = 0;     /* Ctrl-u */
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        settings.c_cc[VWERASE]  = 0;     /* Ctrl-w */
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        settings.c_cc[VLNEXT]   = 0;     /* Ctrl-v */
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        settings.c_cc[VEOL2]    = 0;     /* '\0' */
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        //tcflush(fd, TCIFLUSH);
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        tcsetattr(fd, TCSANOW, &settings);
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}
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bool GpibRegAccess_init(struct GpibRegAccess *ra)
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{
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        const char *portName = "/dev/ttyUSB0";
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        ra->isBurstMode = false;
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        ra->portHandle = (HandleType) open(portName, O_RDWR | O_NOCTTY);
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        int fd = HND(ra->portHandle);
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        if(fd > 0)
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        {
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                tcflush(fd, TCIFLUSH);
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                GpibRegAccess_setFlags(fd, 2);
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        }
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        return fd >= 0;
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}
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void GpibRegAccess_release(struct GpibRegAccess *ra)
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{
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        int fd = HND(ra->portHandle);
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        if(fd >= 0)
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        {
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                close(fd);
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        }
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}
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bool GpibRegAccess_readReg(struct GpibRegAccess *ra, SizeType addr, RegType *pValue)
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{
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        int fd = HND(ra->portHandle);
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        if(fd >= 0)
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        {
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                if(ra->isBurstMode)
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                {
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                        ra->isBurstMode = false;
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                        GpibRegAccess_setFlags(fd, 2);
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                }
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                unsigned char realAddr = (unsigned char)addr | 0x80;
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                ssize_t bytesWrittenRead;
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                bytesWrittenRead = write(fd, &realAddr, 1);
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                if(bytesWrittenRead != 1)
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                {
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                        return false;
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                }
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                bytesWrittenRead = read(fd, pValue, 2);
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                if(bytesWrittenRead != 2)
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                {
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                        return false;
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                }
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                else
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                {
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                        return true;
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                }
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        }
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        else
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        {
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                return false;
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        }
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}
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bool GpibRegAccess_repeatedlyRead(struct GpibRegAccess *ra, SizeType addr,
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                char *buf, SizeType bufLen)
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{
141
        int fd = HND(ra->portHandle);
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        int i;
143
 
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        if(fd > 0)
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        {
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                if(!ra->isBurstMode)
147
                {
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                        ra->isBurstMode = true;
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                        GpibRegAccess_setFlags(fd, 1);
150
                }
151
 
152
                unsigned char realAddr = (unsigned char)addr | 0xc0;
153
                ssize_t bytesWrittenRead;
154
                char addrBuf[3];
155
 
156
                addrBuf[0] = realAddr;
157
                addrBuf[1] = bufLen & 0xFF;
158
                addrBuf[2] = (bufLen >> 8) & 0xFF;
159
 
160
                bytesWrittenRead = write(fd, addrBuf, 3);
161
 
162
                if(bytesWrittenRead != 3)
163
                {
164
                        return false;
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                }
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                bytesWrittenRead = 0;
168
 
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                for(i=0; i<bufLen; i++)
170
                {
171
                        bytesWrittenRead += read(fd, buf+i, 1);
172
                }
173
 
174
                //bytesWrittenRead = read(fd, buf, bufLen);
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176
                if(bytesWrittenRead != bufLen)
177
                {
178
                        return false;
179
                }
180
                else
181
                {
182
                        return true;
183
                }
184
 
185
                return true;
186
        }
187
        else
188
        {
189
                return false;
190
        }
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}
192
 
193
bool GpibRegAccess_writeReg(struct GpibRegAccess *ra, SizeType addr, RegType value)
194
{
195
        int fd = HND(ra->portHandle);
196
 
197
        if(fd >= 0)
198
        {
199
                if(ra->isBurstMode)
200
                {
201
                        ra->isBurstMode = false;
202
                        GpibRegAccess_setFlags(fd, 2);
203
                }
204
 
205
                unsigned char realAddr = (unsigned char)addr & 0x7F;
206
                unsigned int writeBuf;
207
                ssize_t bytesWrittenRead;
208
 
209
                writeBuf = realAddr;
210
                writeBuf |= value << 8;
211
 
212
                bytesWrittenRead = write(fd, &writeBuf, 3);
213
 
214
                if(bytesWrittenRead != 3)
215
                {
216
                        return false;
217
                }
218
                else
219
                {
220
                        return true;
221
                }
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        }
223
        else
224
        {
225
                return false;
226
        }
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}
228
 
229
bool GpibRegAccess_repeatedlyWrite(struct GpibRegAccess *ra, SizeType addr,
230
                char *buf, SizeType bufLen)
231
{
232
        int fd = HND(ra->portHandle);
233
 
234
        if(fd > 0)
235
        {
236
                unsigned char realAddr = (unsigned char)addr | 0x40;
237
                ssize_t bytesWrittenRead;
238
                char addrBuf[3];
239
 
240
                addrBuf[0] = realAddr;
241
                addrBuf[1] = bufLen & 0xFF;
242
                addrBuf[2] = (bufLen >> 8) & 0xFF;
243
 
244
                bytesWrittenRead = write(fd, addrBuf, 3);
245
 
246
                if(bytesWrittenRead != 3)
247
                {
248
                        return false;
249
                }
250
 
251
                bytesWrittenRead = write(fd, buf, bufLen);
252
 
253
                if(bytesWrittenRead != bufLen)
254
                {
255
                        return false;
256
                }
257
                else
258
                {
259
                        return true;
260
                }
261
 
262
                return true;
263
        }
264
        else
265
        {
266
                return false;
267
        }
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}

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