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[/] [gpib_controller/] [trunk/] [vhdl/] [src/] [gpib_helper/] [Clk2x.vhd] - Blame information for rev 3

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1 3 Andrewski
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-- Entity: Clk2x
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-- Date:2012-02-02  
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-- Author: Administrator     
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--
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-- Description ${cursor}
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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library UNISIM;
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use UNISIM.VComponents.all;
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entity Clk2x is
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        port  (
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                reset: in std_logic;
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                clk : in std_logic;
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                clk2x : out std_logic
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        );
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end Clk2x;
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architecture arch of Clk2x is
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        signal GND_BIT, CLKFX_BUF : STD_LOGIC;
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        signal STATUS : std_logic_vector(7 downto 0);
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begin
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        GND_BIT <= '0';
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        clk2x <= CLKFX_BUF;
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        DCM_INST : DCM
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                generic map(
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                        CLKDV_DIVIDE => 2.0,
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                        CLKFX_DIVIDE => 1,
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                        CLKFX_MULTIPLY => 2,
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                        CLKIN_DIVIDE_BY_2 => false,
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                        CLKIN_PERIOD => 20.0,
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                        CLKOUT_PHASE_SHIFT => "NONE",
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                        CLK_FEEDBACK => "NONE",
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                        DESKEW_ADJUST => "SYSTEM_SYNCHRONOUS",
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                        DFS_FREQUENCY_MODE => "LOW",
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                        DLL_FREQUENCY_MODE => "LOW",
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                        DUTY_CYCLE_CORRECTION => TRUE,
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                        FACTORY_JF => x"C080",
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                        PHASE_SHIFT => 0,
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                        STARTUP_WAIT => FALSE
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                )
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                port map (CLKFB=>open,
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                        CLKIN=>clk,
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                        DSSEN=>GND_BIT,
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                        PSCLK=>GND_BIT,
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                        PSEN=>GND_BIT,
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                        PSINCDEC=>GND_BIT,
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                        RST=>reset,
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                        CLKDV=>open,
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                        CLKFX=>CLKFX_BUF,
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                        CLKFX180=>open,
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                        CLK0=>open,
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                        CLK2X=>open,
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                        CLK2X180=>open,
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                        CLK90=>open,
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                        CLK180=>open,
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                        CLK270=>open,
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                        LOCKED=>open,
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                        PSDONE=>open,
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                        STATUS(7 downto 0)=>STATUS
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                );
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end arch;
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