URL https://opencores.org/ocsvn/gpio/gpio/trunk

Subversion Repositories gpio

[/] [gpio/] [trunk/] [sim/] [rtl_sim/] [log/] [ncsim.log] - Blame information for rev 65

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Line No.	Rev	Author	Line
1	56	gorand	`TOOL: ncsim 04.10-b001: Started on Dec 17, 2003 at 12:34:15`
2	48	gorand	`ncsim`
3			`-LICQUEUE`
4			`-f ./ncsim.args`
5			`-MESSAGES`
6			`-NOCOPYRIGHT`
7			`-CDSLIB ../bin/cds.lib`
8			`-HDLVAR ../bin/hdl.var`
9			`-INPUT ncsim.tcl`
10			`-LOGFILE ../log/ncsim.log`
11			`worklib.bench:rtl`
12
13			`Loading snapshot worklib.bench:rtl .................... Done`
14			`ncsim> source /shared/tools/ncsim/tools/inca/files/ncsimrc`
15	56	gorand	`ncsim> database -open waves -shm -into ../out/waves.shm`
16			`Created SHM database waves`
17			`ncsim> probe -create -database waves gpio_testbench -shm -all -depth all`
18			`Created probe 1`
19	48	gorand	`ncsim> run`
20
21			`###`
22			`### GPIO IP Core Verification ###`
23			`###`
24
25			`I. Testing correct operation of RGPIO_CTRL control bits`
26
27			Testing control bit RGPIO_CTRL[ECLK] ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... OK
28			Testing control bit RGPIO_CTRL[NEC] ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... OK
29			`Testing control bit RGPIO_CTRL[INTE] and RGPIO_CTRL[INT] ... OK`
30
31			`II. Testing modes of operation ...`
32
33			`Testing input mode ... OK`
34			`Testing output mode ... OK`
35			`Testing bidirectional I/O ... OK`
36			`Testing auxiliary feature ... OK`
37			`Testing ptrig features ... OK`
38
39			`###`
40			`### FAILED TESTS: 0 ###`
41			`###`
42
43			`report (deaddead)`
44			`exit (00000000)`
45	56	gorand	`/projects/highland/gorand/gpio/bench/verilog/tb_tasks.v:1095 $finish(0);`
46	48	gorand	`ncsim> quit`
47	56	gorand	`TOOL: ncsim 04.10-b001: Exiting on Dec 17, 2003 at 12:35:10 (total: 00:00:55)`

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[/] [gpio/] [trunk/] [sim/] [rtl_sim/] [log/] [ncsim.log] - Blame information for rev 65