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OmarMokhta |
library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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use IEEE.std_logic_unsigned.all;
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entity Synchronizer is
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Port ( R : out STD_LOGIC;
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G : out STD_LOGIC;
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B : out STD_LOGIC;
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HS : out STD_LOGIC;
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VS : out STD_LOGIC;
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Clk : in STD_LOGIC;
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dataIn : in STD_LOGIC_VECTOR (2 downto 0);
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AddressX : out STD_LOGIC_VECTOR (9 downto 0);
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AddressY : out STD_LOGIC_VECTOR (8 downto 0));
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end Synchronizer;
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architecture Behavioral of Synchronizer is
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signal X,nX : STD_LOGIC_VECTOR (10 downto 0) := (others=>'0');
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signal Y,nY : STD_LOGIC_VECTOR (20 downto 0) := (others=>'0');
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constant TPW : STD_LOGIC_VECTOR (1 downto 0) := "00";
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constant TBP : STD_LOGIC_VECTOR (1 downto 0) := "01";
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constant TDP : STD_LOGIC_VECTOR (1 downto 0) := "10";
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constant TFP : STD_LOGIC_VECTOR (1 downto 0) := "11";
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signal XState : STD_LOGIC_VECTOR (1 downto 0) := TPW;
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signal YState : STD_LOGIC_VECTOR (1 downto 0) := TPW;
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signal EnableDisplay : STD_LOGIC;
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signal AddressOfY,nAddressOfY : STD_LOGIC_VECTOR (8 downto 0);
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begin
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nX <= X+1;
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nY <= Y+1;
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nAddressOfY <= AddressOfY+1;
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HS <= '0' when XState=TPW else '1';
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VS <= '0' when YState=TPW else '1';
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EnableDisplay <= '1' when XState=TDP and YState=TDP else '0';
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R <= dataIn(0) when EnableDisplay='1' else '0';
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B <= dataIn(1) when EnableDisplay='1' else '0';
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G <= dataIn(2) when EnableDisplay='1' else '0';
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AddressX <= X(10 downto 1);
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AddressY <= AddressOfY-30;
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process (Clk) begin
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if (rising_edge(Clk)) then
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if (XState=TPW and X(7 downto 1)="1100000") then
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X <= (others=>'0');
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XState <= TBP;
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elsif (XState=TBP and X(6 downto 1)="110000") then
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X <= (others=>'0');
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XState <= TDP;
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elsif (XState=TDP and X(10 downto 1)="1010000000") then
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X <= (others=>'0');
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XState <= TFP;
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elsif (XState=TFP and X(5 downto 1)="10000") then
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X <= (others=>'0');
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XState <= TPW;
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AddressOfY <= nAddressOfY;
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else
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X <= nX;
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end if;
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if (YState=TPW and Y(12 downto 1)="11001000000") then
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Y <= (others=>'0');
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YState <= TBP;
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elsif (YState=TBP and Y(16 downto 1)="101101010100000") then
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Y <= (others=>'0');
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YState <= TDP;
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elsif (YState=TDP and Y(20 downto 1)="1011101110000000000") then
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Y <= (others=>'0');
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YState <= TFP;
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elsif (YState=TFP and Y(14 downto 1)="1111101000000") then
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Y <= (others=>'0');
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X <= (others=>'0');
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YState <= TPW;
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XState <= TPW;
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AddressOfY <= (others=>'0');
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else
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Y <= nY;
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end if;
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end if;
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end process;
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end Behavioral;
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