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edn_walter |
// ha1588_comp.v
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// This file was auto-generated as part of a SOPC Builder generate operation.
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// If you edit it your changes will probably be lost.
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module ha1588_comp (
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input wire clk, // clock.clk
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input wire rst, // clock_reset.reset
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input wire wr_in, // avalon_slave.write
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input wire rd_in, // .read
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input wire [7:0] addr_in, // .address
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input wire [31:0] data_in, // .writedata
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output wire [31:0] data_out, // .readdata
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input wire rtc_clk, // ref_clock.export
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output wire [31:0] rtc_time_ptp_ns, // .export
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output wire [47:0] rtc_time_ptp_sec, // .export
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input wire rx_gmii_clk, // gmii_monitor.export
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input wire rx_gmii_ctrl, // .export
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input wire [7:0] rx_gmii_data, // .export
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input wire tx_gmii_clk, // .export
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input wire tx_gmii_ctrl, // .export
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input wire [7:0] tx_gmii_data // .export
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);
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ha1588 #(
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.addr_is_in_word (1)
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) ha1588_comp (
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.clk (clk), // clock.clk
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.rst (rst), // clock_reset.reset
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.wr_in (wr_in), // avalon_slave.write
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.rd_in (rd_in), // .read
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.addr_in (addr_in), // .address
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.data_in (data_in), // .writedata
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.data_out (data_out), // .readdata
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.rtc_clk (rtc_clk), // ref_clock.export
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.rtc_time_ptp_ns (rtc_time_ptp_ns), // .export
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.rtc_time_ptp_sec (rtc_time_ptp_sec), // .export
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.rx_gmii_clk (rx_gmii_clk), // gmii_monitor.export
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.rx_gmii_ctrl (rx_gmii_ctrl), // .export
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.rx_gmii_data (rx_gmii_data), // .export
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.tx_gmii_clk (tx_gmii_clk), // .export
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.tx_gmii_ctrl (tx_gmii_ctrl), // .export
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.tx_gmii_data (tx_gmii_data) // .export
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);
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endmodule
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