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Subversion Repositories ha1588

[/] [ha1588/] [trunk/] [par/] [xilinx/] [ip/] [coregen.cgc] - Blame information for rev 68

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Line No. Rev Author Line
1 68 ash_riple
2
3
   xilinx.com
4
   project
5
   coregen
6
   1.0
7
   
8
      
9
         dcfifo_128b_16
10
         
11
         
12
            dcfifo_128b_16
13
            Independent_Clocks_Block_RAM
14
            2
15
            2
16
            Native
17
            Standard_FIFO
18
            128
19
            16
20
            128
21
            16
22
            false
23
            true
24
            true
25
            true
26
            Asynchronous_Reset
27
            0
28
            true
29
            0
30
            false
31
            false
32
            false
33
            Active_High
34
            false
35
            Active_High
36
            false
37
            Active_High
38
            false
39
            Active_High
40
            false
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            false
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            false
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            false
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            4
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            true
46
            4
47
            true
48
            4
49
            false
50
            1
51
            1
52
            No_Programmable_Full_Threshold
53
            13
54
            12
55
            No_Programmable_Empty_Threshold
56
            2
57
            3
58
            AXI4_Stream
59
            Common_Clock
60
            false
61
            Slave_Interface_Clock_Enable
62
            false
63
            false
64
            4
65
            32
66
            64
67
            false
68
            1
69
            false
70
            1
71
            false
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            1
73
            false
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            1
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            false
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            1
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            false
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            64
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            false
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            8
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            false
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            4
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            false
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            4
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            true
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            false
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            false
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            4
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            false
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            4
91
            FIFO
92
            Common_Clock_Block_RAM
93
            Data_FIFO
94
            false
95
            false
96
            false
97
            16
98
            false
99
            No_Programmable_Full_Threshold
100
            1023
101
            No_Programmable_Empty_Threshold
102
            1022
103
            FIFO
104
            Common_Clock_Block_RAM
105
            Data_FIFO
106
            false
107
            false
108
            false
109
            1024
110
            false
111
            No_Programmable_Full_Threshold
112
            1023
113
            No_Programmable_Empty_Threshold
114
            1022
115
            FIFO
116
            Common_Clock_Block_RAM
117
            Data_FIFO
118
            false
119
            false
120
            false
121
            16
122
            false
123
            No_Programmable_Full_Threshold
124
            1023
125
            No_Programmable_Empty_Threshold
126
            1022
127
            FIFO
128
            Common_Clock_Block_RAM
129
            Data_FIFO
130
            false
131
            false
132
            false
133
            16
134
            false
135
            No_Programmable_Full_Threshold
136
            1023
137
            No_Programmable_Empty_Threshold
138
            1022
139
            FIFO
140
            Common_Clock_Block_RAM
141
            Data_FIFO
142
            false
143
            false
144
            false
145
            1024
146
            false
147
            No_Programmable_Full_Threshold
148
            1023
149
            No_Programmable_Empty_Threshold
150
            1022
151
            FIFO
152
            Common_Clock_Block_RAM
153
            Data_FIFO
154
            false
155
            false
156
            false
157
            1024
158
            false
159
            No_Programmable_Full_Threshold
160
            1023
161
            No_Programmable_Empty_Threshold
162
            1022
163
            Fully_Registered
164
            Fully_Registered
165
            Fully_Registered
166
            Fully_Registered
167
            Fully_Registered
168
            Fully_Registered
169
            false
170
            Active_High
171
            false
172
            Active_High
173
            false
174
            false
175
            false
176
            false
177
            false
178
            0
179
            4
180
            128
181
            0
182
            128
183
            virtex7
184
            0
185
            0
186
            0
187
            0
188
            0
189
            0
190
            1
191
            1
192
            0
193
            0
194
            0
195
            0
196
            1
197
            2
198
            1
199
            0
200
            2
201
            1
202
            512x72
203
            2
204
            3
205
            0
206
            13
207
            12
208
            0
209
            4
210
            16
211
            1
212
            4
213
            0
214
            1
215
            0
216
            1
217
            0
218
            0
219
            0
220
            4
221
            16
222
            1
223
            4
224
            1
225
            1
226
            0
227
            2
228
            0
229
            0
230
            0
231
            0
232
            0
233
            0
234
            0
235
            0
236
            0
237
            4
238
            32
239
            64
240
            0
241
            0
242
            0
243
            0
244
            0
245
            1
246
            1
247
            1
248
            1
249
            1
250
            0
251
            0
252
            0
253
            0
254
            1
255
            0
256
            0
257
            0
258
            64
259
            8
260
            4
261
            4
262
            4
263
            4
264
            0
265
            0
266
            0
267
            0
268
            0
269
            0
270
            1
271
            1
272
            1
273
            1
274
            1
275
            1
276
            0
277
            0
278
            0
279
            0
280
            0
281
            0
282
            0
283
            0
284
            0
285
            0
286
            0
287
            0
288
            0
289
            0
290
            0
291
            0
292
            0
293
            0
294
            32
295
            64
296
            2
297
            32
298
            64
299
            1
300
            16
301
            1024
302
            16
303
            16
304
            1024
305
            1024
306
            4
307
            10
308
            4
309
            4
310
            10
311
            10
312
            0
313
            0
314
            0
315
            0
316
            0
317
            0
318
            0
319
            0
320
            0
321
            0
322
            0
323
            0
324
            1023
325
            1023
326
            1023
327
            1023
328
            1023
329
            1023
330
            0
331
            0
332
            0
333
            0
334
            0
335
            0
336
            1022
337
            1022
338
            1022
339
            1022
340
            1022
341
            1022
342
            0
343
            0
344
            0
345
            0
346
            0
347
            0
348
         
349
         
350
            
351
               
352
                  coregen
353
                  ./
354
                  ./tmp/
355
                  ./tmp/_cg/
356
               
357
               
358
                  xc7vx330t
359
                  virtex7
360
                  ffg1157
361
                  -3
362
               
363
               
364
                  BusFormatAngleBracketNotRipped
365
                  Verilog
366
                  false
367
                  Other
368
                  false
369
                  false
370
                  false
371
                  Ngc
372
                  false
373
               
374
               
375
                  Behavioral
376
                  Verilog
377
                  false
378
               
379
               
380
                  2012-07-25+18:11
381
               
382
            
383
            
384
               
385
                  customization_generator
386
               
387
               
388
                  model_parameter_resolution_generator
389
               
390
               
391
                  ip_xco_generator
392
                  
393
                     ./dcfifo_128b_16.xco
394
                     xco
395
                     Mon Feb 04 13:33:11 GMT 2013
396
                     0xFA5351A1
397
                     generationID_1879581046
398
                  
399
               
400
               
401
                  associated_files_generator
402
                  
403
                     ./dcfifo_128b_16/doc/fifo_generator_v9_3_vinfo.html
404
                     ignore
405
                     unknown
406
                     Sat Oct 13 03:01:40 GMT 2012
407
                     0x5A766369
408
                     generationID_1879581046
409
                  
410
                  
411
                     ./dcfifo_128b_16/fifo_generator_v9_3_readme.txt
412
                     ignore
413
                     txt
414
                     Sat Oct 13 03:01:40 GMT 2012
415
                     0xD700FB89
416
                     generationID_1879581046
417
                  
418
               
419
               
420
                  ejava_generator
421
                  
422
                     ./dcfifo_128b_16/example_design/dcfifo_128b_16_exdes.ucf
423
                     ignore
424
                     ucf
425
                     Mon Feb 04 13:33:14 GMT 2013
426
                     0xB547BB7D
427
                     generationID_1879581046
428
                  
429
                  
430
                     ./dcfifo_128b_16/example_design/dcfifo_128b_16_exdes.vhd
431
                     ignore
432
                     vhdl
433
                     Mon Feb 04 13:33:14 GMT 2013
434
                     0x3B979BA3
435
                     generationID_1879581046
436
                  
437
                  
438
                     ./dcfifo_128b_16/example_design/dcfifo_128b_16_exdes.xdc
439
                     ignore
440
                     xdc
441
                     Mon Feb 04 13:33:14 GMT 2013
442
                     0x77D89547
443
                     generationID_1879581046
444
                  
445
                  
446
                     ./dcfifo_128b_16/implement/implement.bat
447
                     ignore
448
                     unknown
449
                     Mon Feb 04 13:33:14 GMT 2013
450
                     0x6A073C84
451
                     generationID_1879581046
452
                  
453
                  
454
                     ./dcfifo_128b_16/implement/implement.sh
455
                     ignore
456
                     unknown
457
                     Mon Feb 04 13:33:14 GMT 2013
458
                     0x6F7C2182
459
                     generationID_1879581046
460
                  
461
                  
462
                     ./dcfifo_128b_16/implement/implement_synplify.bat
463
                     ignore
464
                     unknown
465
                     Mon Feb 04 13:33:14 GMT 2013
466
                     0xB20801CF
467
                     generationID_1879581046
468
                  
469
                  
470
                     ./dcfifo_128b_16/implement/implement_synplify.sh
471
                     ignore
472
                     unknown
473
                     Mon Feb 04 13:33:14 GMT 2013
474
                     0xE8586E9E
475
                     generationID_1879581046
476
                  
477
                  
478
                     ./dcfifo_128b_16/implement/planAhead_ise.bat
479
                     ignore
480
                     unknown
481
                     Mon Feb 04 13:33:15 GMT 2013
482
                     0x13CA8FCE
483
                     generationID_1879581046
484
                  
485
                  
486
                     ./dcfifo_128b_16/implement/planAhead_ise.sh
487
                     ignore
488
                     unknown
489
                     Mon Feb 04 13:33:15 GMT 2013
490
                     0x1E2C6C85
491
                     generationID_1879581046
492
                  
493
                  
494
                     ./dcfifo_128b_16/implement/planAhead_ise.tcl
495
                     ignore
496
                     tcl
497
                     Mon Feb 04 13:33:15 GMT 2013
498
                     0xB535F567
499
                     generationID_1879581046
500
                  
501
                  
502
                     ./dcfifo_128b_16/implement/xst.prj
503
                     ignore
504
                     unknown
505
                     Mon Feb 04 13:33:14 GMT 2013
506
                     0xFA056FAD
507
                     generationID_1879581046
508
                  
509
                  
510
                     ./dcfifo_128b_16/implement/xst.scr
511
                     ignore
512
                     unknown
513
                     Mon Feb 04 13:33:14 GMT 2013
514
                     0xF386EDD6
515
                     generationID_1879581046
516
                  
517
                  
518
                     ./dcfifo_128b_16/simulation/dcfifo_128b_16_dgen.vhd
519
                     ignore
520
                     vhdl
521
                     Mon Feb 04 13:33:14 GMT 2013
522
                     0xE0687570
523
                     generationID_1879581046
524
                  
525
                  
526
                     ./dcfifo_128b_16/simulation/dcfifo_128b_16_dverif.vhd
527
                     ignore
528
                     vhdl
529
                     Mon Feb 04 13:33:14 GMT 2013
530
                     0x2AD300F8
531
                     generationID_1879581046
532
                  
533
                  
534
                     ./dcfifo_128b_16/simulation/dcfifo_128b_16_pctrl.vhd
535
                     ignore
536
                     vhdl
537
                     Mon Feb 04 13:33:14 GMT 2013
538
                     0x5A638F1C
539
                     generationID_1879581046
540
                  
541
                  
542
                     ./dcfifo_128b_16/simulation/dcfifo_128b_16_pkg.vhd
543
                     ignore
544
                     vhdl
545
                     Mon Feb 04 13:33:14 GMT 2013
546
                     0xA243A389
547
                     generationID_1879581046
548
                  
549
                  
550
                     ./dcfifo_128b_16/simulation/dcfifo_128b_16_rng.vhd
551
                     ignore
552
                     vhdl
553
                     Mon Feb 04 13:33:14 GMT 2013
554
                     0x58C2DE66
555
                     generationID_1879581046
556
                  
557
                  
558
                     ./dcfifo_128b_16/simulation/dcfifo_128b_16_synth.vhd
559
                     ignore
560
                     vhdl
561
                     Mon Feb 04 13:33:14 GMT 2013
562
                     0x8FA0FB85
563
                     generationID_1879581046
564
                  
565
                  
566
                     ./dcfifo_128b_16/simulation/dcfifo_128b_16_tb.vhd
567
                     ignore
568
                     vhdl
569
                     Mon Feb 04 13:33:14 GMT 2013
570
                     0xE935738F
571
                     generationID_1879581046
572
                  
573
                  
574
                     ./dcfifo_128b_16/simulation/functional/simulate_isim.bat
575
                     ignore
576
                     unknown
577
                     Mon Feb 04 13:33:14 GMT 2013
578
                     0x456B2A56
579
                     generationID_1879581046
580
                  
581
                  
582
                     ./dcfifo_128b_16/simulation/functional/simulate_isim.sh
583
                     ignore
584
                     unknown
585
                     Mon Feb 04 13:33:14 GMT 2013
586
                     0x3C17AB39
587
                     generationID_1879581046
588
                  
589
                  
590
                     ./dcfifo_128b_16/simulation/functional/simulate_mti.bat
591
                     ignore
592
                     unknown
593
                     Mon Feb 04 13:33:14 GMT 2013
594
                     0x0C3CDB0C
595
                     generationID_1879581046
596
                  
597
                  
598
                     ./dcfifo_128b_16/simulation/functional/simulate_mti.do
599
                     ignore
600
                     unknown
601
                     Mon Feb 04 13:33:14 GMT 2013
602
                     0x7D6A1593
603
                     generationID_1879581046
604
                  
605
                  
606
                     ./dcfifo_128b_16/simulation/functional/simulate_mti.sh
607
                     ignore
608
                     unknown
609
                     Mon Feb 04 13:33:14 GMT 2013
610
                     0x5FDBD750
611
                     generationID_1879581046
612
                  
613
                  
614
                     ./dcfifo_128b_16/simulation/functional/simulate_ncsim.bat
615
                     ignore
616
                     unknown
617
                     Mon Feb 04 13:33:14 GMT 2013
618
                     0xA4254226
619
                     generationID_1879581046
620
                  
621
                  
622
                     ./dcfifo_128b_16/simulation/functional/simulate_vcs.bat
623
                     ignore
624
                     unknown
625
                     Mon Feb 04 13:33:14 GMT 2013
626
                     0x1C63A18A
627
                     generationID_1879581046
628
                  
629
                  
630
                     ./dcfifo_128b_16/simulation/functional/ucli_commands.key
631
                     ignore
632
                     unknown
633
                     Mon Feb 04 13:33:14 GMT 2013
634
                     0x0A666EE8
635
                     generationID_1879581046
636
                  
637
                  
638
                     ./dcfifo_128b_16/simulation/functional/vcs_session.tcl
639
                     ignore
640
                     tcl
641
                     Mon Feb 04 13:33:14 GMT 2013
642
                     0xD4648381
643
                     generationID_1879581046
644
                  
645
                  
646
                     ./dcfifo_128b_16/simulation/functional/wave_isim.tcl
647
                     ignore
648
                     tcl
649
                     Mon Feb 04 13:33:14 GMT 2013
650
                     0xFDE9214A
651
                     generationID_1879581046
652
                  
653
                  
654
                     ./dcfifo_128b_16/simulation/functional/wave_mti.do
655
                     ignore
656
                     unknown
657
                     Mon Feb 04 13:33:14 GMT 2013
658
                     0x82BB2BF0
659
                     generationID_1879581046
660
                  
661
                  
662
                     ./dcfifo_128b_16/simulation/functional/wave_ncsim.sv
663
                     ignore
664
                     unknown
665
                     Mon Feb 04 13:33:14 GMT 2013
666
                     0x0E95A497
667
                     generationID_1879581046
668
                  
669
                  
670
                     ./dcfifo_128b_16/simulation/timing/simulate_isim.bat
671
                     ignore
672
                     unknown
673
                     Mon Feb 04 13:33:14 GMT 2013
674
                     0xA505F81A
675
                     generationID_1879581046
676
                  
677
                  
678
                     ./dcfifo_128b_16/simulation/timing/simulate_isim.sh
679
                     ignore
680
                     unknown
681
                     Mon Feb 04 13:33:14 GMT 2013
682
                     0xA7D27397
683
                     generationID_1879581046
684
                  
685
                  
686
                     ./dcfifo_128b_16/simulation/timing/simulate_mti.bat
687
                     ignore
688
                     unknown
689
                     Mon Feb 04 13:33:14 GMT 2013
690
                     0x0C3CDB0C
691
                     generationID_1879581046
692
                  
693
                  
694
                     ./dcfifo_128b_16/simulation/timing/simulate_mti.do
695
                     ignore
696
                     unknown
697
                     Mon Feb 04 13:33:14 GMT 2013
698
                     0x6F9D3F63
699
                     generationID_1879581046
700
                  
701
                  
702
                     ./dcfifo_128b_16/simulation/timing/simulate_mti.sh
703
                     ignore
704
                     unknown
705
                     Mon Feb 04 13:33:14 GMT 2013
706
                     0x5FDBD750
707
                     generationID_1879581046
708
                  
709
                  
710
                     ./dcfifo_128b_16/simulation/timing/simulate_ncsim.bat
711
                     ignore
712
                     unknown
713
                     Mon Feb 04 13:33:14 GMT 2013
714
                     0xF25549FF
715
                     generationID_1879581046
716
                  
717
                  
718
                     ./dcfifo_128b_16/simulation/timing/simulate_vcs.bat
719
                     ignore
720
                     unknown
721
                     Mon Feb 04 13:33:14 GMT 2013
722
                     0x87FF9347
723
                     generationID_1879581046
724
                  
725
                  
726
                     ./dcfifo_128b_16/simulation/timing/ucli_commands.key
727
                     ignore
728
                     unknown
729
                     Mon Feb 04 13:33:14 GMT 2013
730
                     0x0A666EE8
731
                     generationID_1879581046
732
                  
733
                  
734
                     ./dcfifo_128b_16/simulation/timing/vcs_session.tcl
735
                     ignore
736
                     tcl
737
                     Mon Feb 04 13:33:14 GMT 2013
738
                     0x88F84BC0
739
                     generationID_1879581046
740
                  
741
                  
742
                     ./dcfifo_128b_16/simulation/timing/wave_isim.tcl
743
                     ignore
744
                     tcl
745
                     Mon Feb 04 13:33:14 GMT 2013
746
                     0xFDE9214A
747
                     generationID_1879581046
748
                  
749
                  
750
                     ./dcfifo_128b_16/simulation/timing/wave_mti.do
751
                     ignore
752
                     unknown
753
                     Mon Feb 04 13:33:14 GMT 2013
754
                     0x82BB2BF0
755
                     generationID_1879581046
756
                  
757
                  
758
                     ./dcfifo_128b_16/simulation/timing/wave_ncsim.sv
759
                     ignore
760
                     unknown
761
                     Mon Feb 04 13:33:14 GMT 2013
762
                     0x0E95A497
763
                     generationID_1879581046
764
                  
765
               
766
               
767
                  ngc_netlist_generator
768
                  
769
                     ./dcfifo_128b_16.ngc
770
                     ngc
771
                     Mon Feb 04 13:34:56 GMT 2013
772
                     0x1BAFB488
773
                     generationID_1879581046
774
                  
775
               
776
               
777
                  obfuscate_netlist_generator
778
               
779
               
780
                  padded_implementation_netlist_generator
781
               
782
               
783
                  instantiation_template_generator
784
                  
785
                     ./dcfifo_128b_16.veo
786
                     veo
787
                     Mon Feb 04 13:34:57 GMT 2013
788
                     0xCFCA16A7
789
                     generationID_1879581046
790
                  
791
               
792
               
793
                  structural_simulation_model_generator
794
                  
795
                     ./dcfifo_128b_16.v
796
                     verilog
797
                     Mon Feb 04 13:34:57 GMT 2013
798
                     0xED78854A
799
                     generationID_1879581046
800
                  
801
               
802
               
803
                  all_documents_generator
804
                  
805
                     ./dcfifo_128b_16/doc/fifo_generator_v9_3_readme.txt
806
                     ignore
807
                     txt
808
                     Mon Feb 04 13:34:58 GMT 2013
809
                     0xD700FB89
810
                     generationID_1879581046
811
                  
812
                  
813
                     ./dcfifo_128b_16/doc/fifo_generator_v9_3_vinfo.html
814
                     ignore
815
                     unknown
816
                     Mon Feb 04 13:34:58 GMT 2013
817
                     0x5A766369
818
                     generationID_1879581046
819
                  
820
                  
821
                     ./dcfifo_128b_16/doc/pg057-fifo-generator.pdf
822
                     ignore
823
                     pdf
824
                     Mon Feb 04 13:34:58 GMT 2013
825
                     0x1E7EB5CF
826
                     generationID_1879581046
827
                  
828
               
829
               
830
                  readme_documents_generator
831
               
832
               
833
                  asy_generator
834
               
835
               
836
                  xmdf_generator
837
                  
838
                     ./dcfifo_128b_16_xmdf.tcl
839
                     tclXmdf
840
                     tcl
841
                     Mon Feb 04 13:34:58 GMT 2013
842
                     0x5C093755
843
                     generationID_1879581046
844
                  
845
               
846
               
847
                  synthesis_ise_generator
848
                  
849
                     ./dcfifo_128b_16.gise
850
                     ignore
851
                     gise
852
                     Mon Feb 04 13:35:06 GMT 2013
853
                     0x7F79B55A
854
                     generationID_1879581046
855
                  
856
                  
857
                     ./dcfifo_128b_16.xise
858
                     ignore
859
                     xise
860
                     Mon Feb 04 13:35:06 GMT 2013
861
                     0x5720AD26
862
                     generationID_1879581046
863
                  
864
               
865
               
866
                  ise_generator
867
                  
868
                     ./dcfifo_128b_16.gise
869
                     ignore
870
                     gise
871
                     Mon Feb 04 13:35:10 GMT 2013
872
                     0x22FA6F25
873
                     generationID_1879581046
874
                  
875
                  
876
                     ./dcfifo_128b_16.xise
877
                     ignore
878
                     xise
879
                     Mon Feb 04 13:35:10 GMT 2013
880
                     0x766DEC71
881
                     generationID_1879581046
882
                  
883
               
884
               
885
                  deliver_readme_generator
886
               
887
               
888
                  flist_generator
889
                  
890
                     ./dcfifo_128b_16_flist.txt
891
                     ignore
892
                     txtFlist
893
                     txt
894
                     Mon Feb 04 13:35:10 GMT 2013
895
                     0x65B154FB
896
                     generationID_1879581046
897
                  
898
               
899
               
900
                  view_readme_generator
901
               
902
            
903
         
904
      
905
   
906
   
907
      
908
         
909
            coregen
910
            ./
911
            ./tmp/
912
            ./tmp/_cg/
913
         
914
         
915
            xc7vx330t
916
            virtex7
917
            ffg1157
918
            -3
919
         
920
         
921
            BusFormatAngleBracketNotRipped
922
            Verilog
923
            false
924
            Other
925
            false
926
            false
927
            false
928
            Ngc
929
            false
930
         
931
         
932
            Behavioral
933
            Verilog
934
            false
935
         
936
      
937
   
938
939
 

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