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[/] [ha1588/] [trunk/] [sim/] [tsu/] [gmii_rx_bfm.v] - Blame information for rev 46

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Line No. Rev Author Line
1 34 edn_walter
/*
2 38 edn_walter
 * gmii_rx_bfm.v
3 34 edn_walter
 *
4 37 edn_walter
 * Copyright (c) 2012, BABY&HW. All rights reserved.
5 34 edn_walter
 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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 * MA 02110-1301  USA
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 */
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22 4 ash_riple
`timescale 1ns/1ns
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module gmii_rx_bfm
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  (
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    output           gmii_rxclk,
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    output reg       gmii_rxctrl,
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    output reg [7:0] gmii_rxdata
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  );
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reg gmii_rxclk_offset;
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initial begin
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               gmii_rxclk_offset = 1'b0;
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    forever #4 gmii_rxclk_offset = !gmii_rxclk_offset;
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end
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assign #2 gmii_rxclk = gmii_rxclk_offset;
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38 36 edn_walter
integer feeder_file_rx, r_rx, s_rx;
39 4 ash_riple
integer start_addr_rx, end_addr_rx;
40 13 edn_walter
integer index_rx, num_rx;
41 4 ash_riple
reg eof_rx;
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reg pcap_endian_rx;
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reg [31:0] pcap_4bytes_rx;
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reg [31:0] packet_leng_rx;
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reg [ 7:0] packet_byte_rx;
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initial
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begin : feeder_rx
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    gmii_rxctrl = 1'b0;
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    gmii_rxdata = 4'd0;
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    #100;
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    feeder_file_rx = $fopen("ptpdv2_rx.pcap","rb");
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    if (feeder_file_rx == 0)
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    begin
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        $display("Failed to open ptpdv2_rx.pcap!");
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        disable feeder_rx;
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    end
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    else
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    begin
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        // test pcap file endian
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        r_rx = $fread(pcap_4bytes_rx, feeder_file_rx);
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        pcap_endian_rx = (pcap_4bytes_rx == 32'ha1b2c3d4)? 1:0;
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        s_rx = $fseek(feeder_file_rx, -4, 1);
63 4 ash_riple
        // skip pcap file header 24*8
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        s_rx = $fseek(feeder_file_rx, 24, 1);
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        // read packet content
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        eof_rx = 0;
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        num_rx = 0;
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        while (!eof_rx & !$feof(feeder_file_rx))
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        begin : fileread_loop
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            // skip frame header (8+4)*8
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            start_addr_rx = $ftell(feeder_file_rx);
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            s_rx = $fseek(feeder_file_rx, 8+4, 1);
73 4 ash_riple
            // get frame length big endian 4*8
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            r_rx = $fread(packet_leng_rx, feeder_file_rx);
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            packet_leng_rx = pcap_endian_rx?
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                               {packet_leng_rx[31:24], packet_leng_rx[23:16], packet_leng_rx[15: 8], packet_leng_rx[ 7: 0]}:
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                               {packet_leng_rx[ 7: 0], packet_leng_rx[15: 8], packet_leng_rx[23:16], packet_leng_rx[31:24]};
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            // check whether end of file
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            if (r_rx == 0)
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            begin
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                eof_rx = 1;
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                @(posedge gmii_rxclk_offset);
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                gmii_rxctrl = 1'b0;
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                gmii_rxdata = 8'h00;
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                disable fileread_loop;
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            end
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            // send ifg 96bit=12*8
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            repeat (12)
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            begin
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                @(posedge gmii_rxclk_offset)
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                gmii_rxctrl = 1'b0;
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                gmii_rxdata = 8'h00;
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            end
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            // send frame preamble and sfd 5555555d=4*8
95 4 ash_riple
            repeat (3)
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            begin
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                @(posedge gmii_rxclk_offset);
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                gmii_rxctrl = 1'b1;
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                gmii_rxdata = 8'h55;
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            end
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                @(posedge gmii_rxclk_offset)
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                gmii_rxctrl = 1'b1;
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                gmii_rxdata = 8'h5d;
104 4 ash_riple
            // send frame content
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            for (index_rx=0; index_rx<packet_leng_rx; index_rx=index_rx+1)
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            begin
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                r_rx = $fread(packet_byte_rx, feeder_file_rx);
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                @(posedge gmii_rxclk_offset);
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                gmii_rxctrl = 1'b1;
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                gmii_rxdata = packet_byte_rx;
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                // check whether end of file
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                if (r_rx == 0)
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                begin
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                    eof_rx = 1;
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                    @(posedge gmii_rxclk_offset);
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                    gmii_rxctrl = 1'b0;
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                    gmii_rxdata = 8'h00;
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                    disable fileread_loop;
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                end
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            end
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            end_addr_rx = $ftell(feeder_file_rx);
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            num_rx = num_rx + 1;
123 4 ash_riple
        end
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        $fclose(feeder_file_rx);
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        gmii_rxctrl = 1'b0;
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        gmii_rxdata = 8'h00;
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    end
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end
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endmodule

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