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[/] [ha1588/] [trunk/] [sim/] [tsu/] [tsu_queue_tb.v] - Blame information for rev 54

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Line No. Rev Author Line
1 34 edn_walter
/*
2 38 edn_walter
 * tsu_queue_tb.v
3 34 edn_walter
 *
4 37 edn_walter
 * Copyright (c) 2012, BABY&HW. All rights reserved.
5 34 edn_walter
 *
6
 * This library is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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 * MA 02110-1301  USA
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 */
21
 
22 4 ash_riple
`timescale 1ns/1ns
23
 
24
module tsu_queue_tb;
25
 
26 54 edn_walter
parameter giga_mode = 1'b1;
27
 
28 5 ash_riple
reg         rst;
29
wire        gmii_rxclk;
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wire        gmii_rxctrl;
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wire [ 7:0] gmii_rxdata;
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wire        gmii_txclk;
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wire        gmii_txctrl;
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wire [ 7:0] gmii_txdata;
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reg         rtc_timer_clk;
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reg  [79:0] rtc_timer_in;
37 37 edn_walter
reg          q_rd_clk;
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reg          q_rd_en;
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wire [  7:0] q_rd_stat;
40
wire [127:0] q_rd_data;
41 4 ash_riple
 
42
initial begin
43 8 edn_walter
  // emulate the hardware behavior when power-up
44 4 ash_riple
  DUT_RX.ts_ack = 1'b0;
45 13 edn_walter
  DUT_TX.ts_ack = 1'b0;
46 4 ash_riple
 
47
      rst = 1'b0;
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  #10 rst = 1'b1;
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  #20 rst = 1'b0;
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end
51
 
52
initial begin
53 5 ash_riple
             q_rd_clk = 1'b0;
54
  forever #5 q_rd_clk = !q_rd_clk;
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end
56
 
57
initial begin
58 4 ash_riple
             rtc_timer_clk = 1'b0;
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  forever #4 rtc_timer_clk = !rtc_timer_clk;
60
end
61
 
62
initial begin
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                                   rtc_timer_in = 80'd0;
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  forever @(posedge rtc_timer_clk) rtc_timer_in = rtc_timer_in +1;
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end
66
 
67 15 edn_walter
tsu DUT_RX
68 4 ash_riple
  (
69
    .rst(rst),
70
 
71
    .gmii_clk(gmii_rxclk),
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    .gmii_ctrl(gmii_rxctrl),
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    .gmii_data(gmii_rxdata),
74 54 edn_walter
    .giga_mode(giga_mode),
75 4 ash_riple
 
76 43 edn_walter
    .ptp_msgid_mask(8'b11111111),
77
 
78 4 ash_riple
    .rtc_timer_clk(rtc_timer_clk),
79 32 edn_walter
    .rtc_timer_in(rtc_timer_in),
80 5 ash_riple
 
81
    .q_rst(rst),
82
    .q_rd_clk(q_rd_clk),
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    .q_rd_en(q_rd_en),
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    .q_rd_stat(q_rd_stat),
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    .q_rd_data(q_rd_data)
86 4 ash_riple
  );
87
 
88
gmii_rx_bfm BFM_RX
89
  (
90
    .gmii_rxclk(gmii_rxclk),
91
    .gmii_rxctrl(gmii_rxctrl),
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    .gmii_rxdata(gmii_rxdata)
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  );
94 54 edn_walter
defparam BFM_RX.giga_mode = giga_mode;
95 4 ash_riple
 
96 13 edn_walter
 
97 15 edn_walter
tsu DUT_TX
98 4 ash_riple
  (
99
    .rst(rst),
100
 
101
    .gmii_clk(gmii_txclk),
102
    .gmii_ctrl(gmii_txctrl),
103
    .gmii_data(gmii_txdata),
104 54 edn_walter
    .giga_mode(giga_mode),
105 4 ash_riple
 
106 43 edn_walter
    .ptp_msgid_mask(8'b11111111),
107
 
108 4 ash_riple
    .rtc_timer_clk(rtc_timer_clk),
109 32 edn_walter
    .rtc_timer_in(rtc_timer_in),
110 5 ash_riple
 
111
    .q_rst(rst),
112
    .q_rd_clk(q_rd_clk),
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    .q_rd_en(),
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    .q_rd_stat(),
115
    .q_rd_data()
116 4 ash_riple
  );
117
 
118
gmii_tx_bfm BFM_TX
119
  (
120
    .gmii_txclk(gmii_txclk),
121
    .gmii_txctrl(gmii_txctrl),
122
    .gmii_txdata(gmii_txdata)
123
  );
124 54 edn_walter
defparam BFM_TX.giga_mode = giga_mode;
125 4 ash_riple
 
126 36 edn_walter
integer rx_ptp_event_cnt, rx_ptp_mismatch_cnt;
127
integer ref_file_handle_rx, return_fscanf_rx, ref_num_rx;
128 35 edn_walter
initial begin
129 36 edn_walter
  rx_ptp_event_cnt = 0;
130
  rx_ptp_mismatch_cnt = 0;
131
  ref_file_handle_rx = $fopen("ptpdv2_rx.txt","r");
132 35 edn_walter
  forever @(posedge DUT_RX.q_wr_en) begin
133
    rx_ptp_event_cnt = rx_ptp_event_cnt + 1;
134 36 edn_walter
    return_fscanf_rx = $fscanf(ref_file_handle_rx, "%d", ref_num_rx);
135
    if (BFM_RX.num_rx != ref_num_rx) begin
136
      $warning("%d %d", BFM_RX.num_rx, ref_num_rx);
137
      rx_ptp_mismatch_cnt = rx_ptp_mismatch_cnt + 1;
138
    end
139 35 edn_walter
  end
140 36 edn_walter
  $fclose(ref_file_handle_rx);
141 35 edn_walter
end
142 13 edn_walter
 
143 36 edn_walter
integer tx_ptp_event_cnt, tx_ptp_mismatch_cnt;
144
integer ref_file_handle_tx, return_fscanf_tx, ref_num_tx;
145 35 edn_walter
initial begin
146 36 edn_walter
  tx_ptp_event_cnt = 0;
147
  tx_ptp_mismatch_cnt = 0;
148
  ref_file_handle_tx = $fopen("ptpdv2_tx.txt","r");
149 35 edn_walter
  forever @(posedge DUT_TX.q_wr_en) begin
150
    tx_ptp_event_cnt = tx_ptp_event_cnt + 1;
151 36 edn_walter
    return_fscanf_tx = $fscanf(ref_file_handle_tx, "%d", ref_num_tx);
152
    if (BFM_TX.num_tx != ref_num_tx) begin
153
      $warning("%d %d", BFM_TX.num_tx, ref_num_tx);
154
      tx_ptp_mismatch_cnt = tx_ptp_mismatch_cnt + 1;
155
    end
156 35 edn_walter
  end
157 36 edn_walter
  $fclose(ref_file_handle_tx);
158 35 edn_walter
end
159
 
160 36 edn_walter
initial begin
161
  fork
162
    @(posedge BFM_RX.eof_rx);
163
    @(posedge BFM_TX.eof_tx);
164
  join
165
 
166 54 edn_walter
  if (rx_ptp_event_cnt == 0)
167
    $display("RX Parser Test Fail: found 0 PTP-EVENT!\n");
168
  if (tx_ptp_event_cnt == 0)
169
    $display("TX Parser Test Fail: found 0 PTP-EVENT!\n");
170
  if (rx_ptp_mismatch_cnt > 0)
171
    $display("Rx Parser Mismatch Found: RX-PTP-EVENT-MISMATCH = %d\n", rx_ptp_mismatch_cnt);
172
  if (tx_ptp_mismatch_cnt > 0)
173
    $display("Tx Parser Mismatch Found: TX-PTP-EVENT-MISMATCH = %d\n", tx_ptp_mismatch_cnt);
174 36 edn_walter
 
175 54 edn_walter
  if (rx_ptp_event_cnt > 0 && rx_ptp_mismatch_cnt == 0)
176
    $display("RX Parser Test Pass: RX-PTP-EVENT = %d\n", rx_ptp_event_cnt);
177
  if (tx_ptp_event_cnt > 0 && tx_ptp_mismatch_cnt == 0)
178
    $display("TX Parser Test Pass: TX-PTP-EVENT = %d\n", tx_ptp_event_cnt);
179
 
180 36 edn_walter
  #100 $stop;
181
end
182
 
183 4 ash_riple
endmodule
184
 

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