1 |
73 |
ash_riple |
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2 |
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PARAMETER VERSION = 2.1.0
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3 |
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4 |
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5 |
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PORT ha1588_axi_0_rx_gmii_data_pin = ha1588_axi_0_rx_gmii_data, DIR = I, VEC = [7:0]
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6 |
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PORT ha1588_axi_0_rtc_time_ptp_ns_pin = ha1588_axi_0_rtc_time_ptp_ns, DIR = O, VEC = [31:0]
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7 |
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PORT ha1588_axi_0_tx_giga_mode_pin = ha1588_axi_0_tx_giga_mode, DIR = I
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8 |
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PORT ha1588_axi_0_rx_giga_mode_pin = ha1588_axi_0_rx_giga_mode, DIR = I
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9 |
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PORT ha1588_axi_0_rtc_time_one_pps_pin = ha1588_axi_0_rtc_time_one_pps, DIR = O
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10 |
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PORT ha1588_axi_0_tx_gmii_clk_pin = ha1588_axi_0_tx_gmii_clk, DIR = I
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11 |
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PORT ha1588_axi_0_rtc_time_ptp_sec_pin = ha1588_axi_0_rtc_time_ptp_sec, DIR = O, VEC = [47:0]
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12 |
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PORT ha1588_axi_0_rx_gmii_clk_pin = ha1588_axi_0_rx_gmii_clk, DIR = I
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13 |
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PORT ha1588_axi_0_tx_gmii_ctrl_pin = ha1588_axi_0_tx_gmii_ctrl, DIR = I
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14 |
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PORT ha1588_axi_0_rx_gmii_ctrl_pin = ha1588_axi_0_rx_gmii_ctrl, DIR = I
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15 |
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PORT ha1588_axi_0_tx_gmii_data_pin = ha1588_axi_0_tx_gmii_data, DIR = I, VEC = [7:0]
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16 |
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PORT INTR_OUT = ha1588_axi_0_INTR_OUT, DIR = O, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH
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17 |
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PORT INTR_IN = axi_lite_master_bfm_0_INTR_IN, DIR = I
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18 |
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PORT CLK = net_axi_lite_master_bfm_0_M_AXI_ACLK_pin, DIR = I, SIGIS = CLK
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19 |
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PORT RST_N = net_axi_interconnect_0_INTERCONNECT_ARESETN_pin, DIR = I, SIGIS = RST
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20 |
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21 |
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22 |
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BEGIN ha1588_axi
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23 |
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PARAMETER INSTANCE = ha1588_axi_0
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24 |
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PARAMETER HW_VER = 1.00.a
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25 |
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PARAMETER C_S_AXI_REG_RNG00_BASEADDR = 0x00000000
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26 |
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PARAMETER C_S_AXI_REG_RNG00_HIGHADDR = 0x00000FFF
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27 |
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BUS_INTERFACE S_AXI_REG = axi_interconnect_0
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28 |
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PORT S_AXI_REG_ACLK = net_axi_lite_master_bfm_0_M_AXI_ACLK_pin
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29 |
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PORT rx_gmii_data = ha1588_axi_0_rx_gmii_data
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30 |
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PORT rtc_time_ptp_ns = ha1588_axi_0_rtc_time_ptp_ns
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31 |
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PORT tx_giga_mode = ha1588_axi_0_tx_giga_mode
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32 |
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PORT rx_giga_mode = ha1588_axi_0_rx_giga_mode
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33 |
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PORT rtc_time_one_pps = ha1588_axi_0_rtc_time_one_pps
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34 |
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PORT tx_gmii_clk = ha1588_axi_0_tx_gmii_clk
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35 |
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PORT rtc_time_ptp_sec = ha1588_axi_0_rtc_time_ptp_sec
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36 |
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PORT rx_gmii_clk = ha1588_axi_0_rx_gmii_clk
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37 |
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PORT tx_gmii_ctrl = ha1588_axi_0_tx_gmii_ctrl
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38 |
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PORT rx_gmii_ctrl = ha1588_axi_0_rx_gmii_ctrl
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39 |
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PORT tx_gmii_data = ha1588_axi_0_tx_gmii_data
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40 |
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PORT rtc_clk = net_axi_lite_master_bfm_0_M_AXI_ACLK_pin
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41 |
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PORT INTR_OUT = ha1588_axi_0_INTR_OUT
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42 |
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END
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43 |
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44 |
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BEGIN axi_interconnect
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45 |
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PARAMETER INSTANCE = axi_interconnect_0
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46 |
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PARAMETER HW_VER = 1.06.a
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47 |
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PARAMETER C_INTERCONNECT_CONNECTIVITY_MODE = 0
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48 |
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PORT INTERCONNECT_ACLK = net_axi_lite_master_bfm_0_M_AXI_ACLK_pin
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49 |
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PORT INTERCONNECT_ARESETN = net_axi_interconnect_0_INTERCONNECT_ARESETN_pin
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50 |
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END
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51 |
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52 |
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BEGIN axi_lite_master_bfm
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53 |
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PARAMETER INSTANCE = axi_lite_master_bfm_0
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54 |
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PARAMETER HW_VER = 1.00.a
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55 |
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BUS_INTERFACE M_AXI = axi_interconnect_0
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56 |
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PORT M_AXI_ACLK = net_axi_lite_master_bfm_0_M_AXI_ACLK_pin
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57 |
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PORT INTR_IN = axi_lite_master_bfm_0_INTR_IN
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58 |
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END
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59 |
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