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[/] [ha1588/] [trunk/] [sys/] [xilinx_xps/] [system.tb.v] - Blame information for rev 74

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1 73 ash_riple
//-----------------------------------------------------------------------------
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// system.tb.v
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//-----------------------------------------------------------------------------
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`timescale 1 ps / 100 fs
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// START USER CODE (Do not remove this line)
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// User: Put your directives here. Code in this
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//       section will not be overwritten.
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// END USER CODE (Do not remove this line)
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module system_tb
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  (
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  );
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  // START USER CODE (Do not remove this line)
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  // User: Put your signals here. Code in this
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  //       section will not be overwritten.
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  parameter PERIOD = 10000;
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  // END USER CODE (Do not remove this line)
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  // Internal signals
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  reg CLK;
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  reg RST_N;
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  wire INTR;
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  system
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    dut (
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      .RST_N ( RST_N ),
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      .CLK ( CLK ),
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      .INTR_IN ( INTR ),
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      .INTR_OUT ( INTR )
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    );
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  // START USER CODE (Do not remove this line)
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  // User: Put your stimulus here. Code in this
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  //       section will not be overwritten.
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     initial begin
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        RST_N = 1'b0;
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        @(negedge CLK);
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        @(negedge CLK);
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        @(negedge CLK);
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        RST_N = 1'b1;
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     end
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     always begin
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        CLK = 1'b0;
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        #(PERIOD/2) CLK = 1'b1;
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        #(PERIOD/2);
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     end
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  // END USER CODE (Do not remove this line)
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endmodule
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