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[/] [hd44780_driver/] [trunk/] [tb_example_driver.do] - Blame information for rev 2

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# Filename:     tb_example_driver.do
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# Filetype:     Modelsim Script File
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# Date:         26 oct 2012
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# Update:       -
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# Description:  Script File For Automatic Simulation
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# Author:       J. op den Brouw
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# State:        Demo
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# Error:        -
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# Version:      1.1aplha
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# Copyright:    (c)2012, De Haagse Hogeschool
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# This ModelSim command file houses all commands for tracing
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# the client side module driver alias the test hardware.
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# Set transcript on
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transcript on
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# Recreate the work directory and map to work
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if {[file exists rtl_work]} {
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        vdel -lib rtl_work -all
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}
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vlib rtl_work
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vmap work rtl_work
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# Find out if we're started through Quartus or by hand
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# (or by using an exec in the Tcl window in Quartus).
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# Quartus has the annoying property that it will start
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# Modelsim from a directory called "simulation/modelsim".
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# The design and the testbench are located in the project
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# root, so we've to compensate for that.
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if [ string match "*simulation/modelsim" [pwd] ] {
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        set prefix "../../"
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        puts "Running Modelsim from Quartus..."
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} else {
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        set prefix ""
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        puts "Running Modelsim..."
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}
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# Compile the LCD VHDL description and testbench,
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# please note that the design and its testbench are located
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# in the project root, but the simulator start in directory
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# /simulation/modelsim, so we have to compensate
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# for that.
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vcom -2008 -work work ${prefix}lcd_driver_hd44780_module.vhd
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vcom -2008 -work work ${prefix}example_driver.vhd
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vcom -2008 -work work ${prefix}tb_example_driver.vhd
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# Start the simulator with 1 ns time resolution
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vsim -t 1ns -L rtl_work -L work -voptargs="+acc" tb_example_driver
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# Log all signals in the design, good if the number
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# of signals is small.
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add log -r *
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# Add all toplevel signals
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# Add a number of signals of the simulated design
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add wave -divider "SYSTEM"
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add wave CLOCK_50
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add wave -divider "Inputs"
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add wave BUTTON
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add wave -divider "Internals"
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add wave de0/areset
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add wave de0/clk
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add wave de0/state
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add wave de0/busy
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add wave de0/wr
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add wave de0/goto10
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add wave de0/goto20
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add wave de0/goto30
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add wave de0/home
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add wave de0/cls
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add wave de0/line_counter
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add wave de0/character_counter
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add wave -divider "Outputs"
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add wave LCD_EN
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add wave LCD_RW
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add wave LCD_RS
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add wave LCD_DATA
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add wave LEDG(0)
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# Open Structure, Signals (waveform) and List window
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view structure
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#view list
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view signals
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view wave
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# Run simulation for ...
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# Note 60 ms is sufficient if using Busy Flag reading, 270 ms
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# for non-BF reading
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run 270 ms
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# Fill up the waveform in the window
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wave zoom full

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