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https://opencores.org/ocsvn/hdlc/hdlc/trunk
[/] [hdlc/] [trunk/] [CODE/] [TOP/] [scripts/] [nc-sim/] [build_TxFCS_Buff.csh] - Blame information for rev 17
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khatib |
#! /bin/tcsh -f
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mkdir -p work
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mkdir -p utility
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mkdir -p hdlc
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mkdir -p memLib
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# Utility files
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ncvhdl -work utility -cdslib ./cds.lib -logfile ncvhdl.log -errormax 15 -append_log -v93 -linedebug -messages -status ./tools_pkg.vhd
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#memLib
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ncvhdl -work memLib -cdslib ./cds.lib -logfile ncvhdl.log -append_log -errormax 15 -update -v93 -linedebug -messages -status ./spmem.vhd
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ncvhdl -work memLib -cdslib ./cds.lib -logfile ncvhdl.log -append_log -errormax 15 -update -v93 -linedebug -messages -status ./mem_pkg.vhd
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#HDLC files
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ncvhdl -work hdlc -cdslib ./cds.lib -logfile ncvhdl.log -append_log -errormax 15 -update -v93 -linedebug -messages -status ./PCK_CRC16_D8.vhd
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#Work files
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ncvhdl -work work -cdslib ./cds.lib -logfile ncvhdl.log -append_log -errormax 15 -update -v93 -linedebug -messages -status ./TxFCS.vhd
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ncvhdl -work work -cdslib ./cds.lib -logfile ncvhdl.log -append_log -errormax 15 -update -v93 -linedebug -messages -status ./TxBuff.vhd
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ncvhdl -work work -cdslib ./cds.lib -logfile ncvhdl.log -append_log -errormax 15 -update -v93 -linedebug -messages -status ./Txtop_tb.vhd
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#elaborating design
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ncelab -work work -cdslib /home/jamil/Designs/hdlc/cds.lib -logfile ncelab.log -errormax 15 -messages -status -v93 work.txtop_ent_tb:txtop_beh_tb
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