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serginhofr |
; Options for the MIPS port of the compiler
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;
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; Copyright (C) 2005-2014 Free Software Foundation, Inc.
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;
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; This file is part of GCC.
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;
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; GCC is free software; you can redistribute it and/or modify it under
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; the terms of the GNU General Public License as published by the Free
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; Software Foundation; either version 3, or (at your option) any later
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; version.
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;
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; GCC is distributed in the hope that it will be useful, but WITHOUT
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; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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; License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with GCC; see the file COPYING3. If not see
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; .
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HeaderInclude
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config/mips/mips-opts.h
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EB
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Driver
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EL
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Driver
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mabi=
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Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
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-mabi=ABI Generate code that conforms to the given ABI
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Enum
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Name(mips_abi) Type(int)
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Known MIPS ABIs (for use with the -mabi= option):
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EnumValue
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Enum(mips_abi) String(32) Value(ABI_32)
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EnumValue
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Enum(mips_abi) String(o64) Value(ABI_O64)
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EnumValue
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Enum(mips_abi) String(n32) Value(ABI_N32)
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EnumValue
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Enum(mips_abi) String(64) Value(ABI_64)
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EnumValue
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Enum(mips_abi) String(eabi) Value(ABI_EABI)
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mabicalls
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Target Report Mask(ABICALLS)
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Generate code that can be used in SVR4-style dynamic objects
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mmad
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Target Report Var(TARGET_MAD)
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Use PMC-style 'mad' instructions
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mimadd
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Target Report Mask(IMADD)
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Use integer madd/msub instructions
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march=
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Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
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-march=ISA Generate code for the given ISA
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mbranch-cost=
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Target RejectNegative Joined UInteger Var(mips_branch_cost)
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-mbranch-cost=COST Set the cost of branches to roughly COST instructions
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mbranch-likely
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Target Report Mask(BRANCHLIKELY)
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Use Branch Likely instructions, overriding the architecture default
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mflip-mips16
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Target Report Var(TARGET_FLIP_MIPS16)
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Switch on/off MIPS16 ASE on alternating functions for compiler testing
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mcheck-zero-division
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Target Report Mask(CHECK_ZERO_DIV)
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Trap on integer divide by zero
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mcode-readable=
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Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
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-mcode-readable=SETTING Specify when instructions are allowed to access code
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Enum
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Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
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Valid arguments to -mcode-readable=:
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EnumValue
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Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
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EnumValue
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Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
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EnumValue
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Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
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mdivide-breaks
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Target Report RejectNegative Mask(DIVIDE_BREAKS)
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Use branch-and-break sequences to check for integer divide by zero
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mdivide-traps
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Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
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Use trap instructions to check for integer divide by zero
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mdmx
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Target Report RejectNegative Var(TARGET_MDMX)
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Allow the use of MDMX instructions
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mdouble-float
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Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
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Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
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mdsp
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Target Report Var(TARGET_DSP)
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Use MIPS-DSP instructions
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mdspr2
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Target Report Var(TARGET_DSPR2)
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Use MIPS-DSP REV 2 instructions
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mdebug
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Target Var(TARGET_DEBUG_MODE) Undocumented
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mdebugd
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Target Var(TARGET_DEBUG_D_MODE) Undocumented
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meb
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Target Report RejectNegative Mask(BIG_ENDIAN)
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Use big-endian byte order
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mel
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Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
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Use little-endian byte order
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membedded-data
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Target Report Var(TARGET_EMBEDDED_DATA)
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Use ROM instead of RAM
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meva
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Target Report Var(TARGET_EVA)
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Use Enhanced Virtual Addressing instructions
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mexplicit-relocs
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Target Report Mask(EXPLICIT_RELOCS)
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Use NewABI-style %reloc() assembly operators
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mextern-sdata
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Target Report Var(TARGET_EXTERN_SDATA) Init(1)
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Use -G for data that is not defined by the current object
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mfix-24k
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Target Report Var(TARGET_FIX_24K)
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Work around certain 24K errata
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mfix-r4000
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Target Report Mask(FIX_R4000)
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Work around certain R4000 errata
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mfix-r4400
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Target Report Mask(FIX_R4400)
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Work around certain R4400 errata
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mfix-rm7000
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Target Report Var(TARGET_FIX_RM7000)
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Work around certain RM7000 errata
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mfix-r10000
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Target Report Mask(FIX_R10000)
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Work around certain R10000 errata
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mfix-sb1
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Target Report Var(TARGET_FIX_SB1)
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Work around errata for early SB-1 revision 2 cores
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mfix-vr4120
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Target Report Var(TARGET_FIX_VR4120)
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Work around certain VR4120 errata
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mfix-vr4130
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Target Report Var(TARGET_FIX_VR4130)
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Work around VR4130 mflo/mfhi errata
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mfix4300
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Target Report Var(TARGET_4300_MUL_FIX)
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Work around an early 4300 hardware bug
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mfp-exceptions
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Target Report Var(TARGET_FP_EXCEPTIONS) Init(1)
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FP exceptions are enabled
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mfp32
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Target Report RejectNegative InverseMask(FLOAT64)
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Use 32-bit floating-point registers
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mfp64
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Target Report RejectNegative Mask(FLOAT64)
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Use 64-bit floating-point registers
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mflush-func=
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Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
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-mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
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mfused-madd
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Target Report Var(TARGET_FUSED_MADD) Init(1)
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Generate floating-point multiply-add instructions
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mabs=
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Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_abs) Init(MIPS_IEEE_754_DEFAULT)
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-mabs=MODE Select the IEEE 754 ABS/NEG instruction execution mode
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mnan=
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Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_nan) Init(MIPS_IEEE_754_DEFAULT)
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-mnan=ENCODING Select the IEEE 754 NaN data encoding
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Enum
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Name(mips_ieee_754_value) Type(int)
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Known MIPS IEEE 754 settings (for use with the -mabs= and -mnan= options):
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EnumValue
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Enum(mips_ieee_754_value) String(2008) Value(MIPS_IEEE_754_2008)
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EnumValue
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Enum(mips_ieee_754_value) String(legacy) Value(MIPS_IEEE_754_LEGACY)
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mgp32
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Target Report RejectNegative InverseMask(64BIT)
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Use 32-bit general registers
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mgp64
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Target Report RejectNegative Mask(64BIT)
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Use 64-bit general registers
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mgpopt
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Target Report Var(TARGET_GPOPT) Init(1)
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Use GP-relative addressing to access small data
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mplt
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Target Report Var(TARGET_PLT)
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When generating -mabicalls code, allow executables to use PLTs and copy relocations
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mhard-float
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Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
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Allow the use of hardware floating-point ABI and instructions
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minterlink-compressed
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Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
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Generate code that is link-compatible with MIPS16 and microMIPS code.
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minterlink-mips16
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Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
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An alias for minterlink-compressed provided for backward-compatibility.
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mips
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Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
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-mipsN Generate code for ISA level N
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mips16
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Target Report RejectNegative Mask(MIPS16)
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Generate MIPS16 code
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mips3d
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Target Report RejectNegative Var(TARGET_MIPS3D)
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Use MIPS-3D instructions
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mllsc
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Target Report Mask(LLSC)
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Use ll, sc and sync instructions
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mlocal-sdata
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Target Report Var(TARGET_LOCAL_SDATA) Init(1)
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Use -G for object-local data
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mlong-calls
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Target Report Var(TARGET_LONG_CALLS)
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Use indirect calls
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mlong32
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Target Report RejectNegative InverseMask(LONG64, LONG32)
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Use a 32-bit long type
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mlong64
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Target Report RejectNegative Mask(LONG64)
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Use a 64-bit long type
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mmcount-ra-address
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Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
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Pass the address of the ra save location to _mcount in $12
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mmemcpy
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Target Report Mask(MEMCPY)
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Don't optimize block moves
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mmicromips
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Target Report Mask(MICROMIPS)
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Use microMIPS instructions
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mmt
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Target Report Var(TARGET_MT)
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Allow the use of MT instructions
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mno-float
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Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
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Prevent the use of all floating-point operations
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mmcu
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Target Report Var(TARGET_MCU)
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Use MCU instructions
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mno-flush-func
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Target RejectNegative
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Do not use a cache-flushing function before calling stack trampolines
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mno-mdmx
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Target Report RejectNegative Var(TARGET_MDMX, 0)
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Do not use MDMX instructions
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mno-mips16
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Target Report RejectNegative InverseMask(MIPS16)
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Generate normal-mode code
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mno-mips3d
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Target Report RejectNegative Var(TARGET_MIPS3D, 0)
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Do not use MIPS-3D instructions
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mpaired-single
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Target Report Mask(PAIRED_SINGLE_FLOAT)
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Use paired-single floating-point instructions
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mr10k-cache-barrier=
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Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
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-mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
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Enum
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Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
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Valid arguments to -mr10k-cache-barrier=:
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| 341 |
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EnumValue
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Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
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EnumValue
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Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
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| 347 |
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EnumValue
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Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
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mrelax-pic-calls
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Target Report Mask(RELAX_PIC_CALLS)
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Try to allow the linker to turn PIC calls into direct calls
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mshared
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Target Report Var(TARGET_SHARED) Init(1)
|
| 357 |
|
|
When generating -mabicalls code, make the code suitable for use in shared libraries
|
| 358 |
|
|
|
| 359 |
|
|
msingle-float
|
| 360 |
|
|
Target Report RejectNegative Mask(SINGLE_FLOAT)
|
| 361 |
|
|
Restrict the use of hardware floating-point instructions to 32-bit operations
|
| 362 |
|
|
|
| 363 |
|
|
msmartmips
|
| 364 |
|
|
Target Report Mask(SMARTMIPS)
|
| 365 |
|
|
Use SmartMIPS instructions
|
| 366 |
|
|
|
| 367 |
|
|
msoft-float
|
| 368 |
|
|
Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
|
| 369 |
|
|
Prevent the use of all hardware floating-point instructions
|
| 370 |
|
|
|
| 371 |
|
|
msplit-addresses
|
| 372 |
|
|
Target Report Mask(SPLIT_ADDRESSES)
|
| 373 |
|
|
Optimize lui/addiu address loads
|
| 374 |
|
|
|
| 375 |
|
|
msym32
|
| 376 |
|
|
Target Report Var(TARGET_SYM32)
|
| 377 |
|
|
Assume all symbols have 32-bit values
|
| 378 |
|
|
|
| 379 |
|
|
msynci
|
| 380 |
|
|
Target Report Mask(SYNCI)
|
| 381 |
|
|
Use synci instruction to invalidate i-cache
|
| 382 |
|
|
|
| 383 |
|
|
mtune=
|
| 384 |
|
|
Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
|
| 385 |
|
|
-mtune=PROCESSOR Optimize the output for PROCESSOR
|
| 386 |
|
|
|
| 387 |
|
|
muninit-const-in-rodata
|
| 388 |
|
|
Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
|
| 389 |
|
|
Put uninitialized constants in ROM (needs -membedded-data)
|
| 390 |
|
|
|
| 391 |
|
|
mvirt
|
| 392 |
|
|
Target Report Var(TARGET_VIRT)
|
| 393 |
|
|
Use Virtualization Application Specific instructions
|
| 394 |
|
|
|
| 395 |
|
|
mvr4130-align
|
| 396 |
|
|
Target Report Mask(VR4130_ALIGN)
|
| 397 |
|
|
Perform VR4130-specific alignment optimizations
|
| 398 |
|
|
|
| 399 |
|
|
mxgot
|
| 400 |
|
|
Target Report Var(TARGET_XGOT)
|
| 401 |
|
|
Lift restrictions on GOT size
|
| 402 |
|
|
|
| 403 |
|
|
mpatfree
|
| 404 |
|
|
Target Report Mask(PATFREE)
|
| 405 |
|
|
Do not use patented lwl/lwr/swl/swr instructions
|
| 406 |
|
|
|
| 407 |
|
|
mnohwdiv
|
| 408 |
|
|
Target Report Mask(NO_HW_DIV)
|
| 409 |
|
|
No hardware divu/div instruction support
|
| 410 |
|
|
|
| 411 |
|
|
mnohwmult
|
| 412 |
|
|
Target Report Mask(NO_HW_MULT)
|
| 413 |
|
|
No hardware multu/mult instruction support
|
| 414 |
|
|
|
| 415 |
|
|
noasmopt
|
| 416 |
|
|
Driver
|
