1 |
13 |
serginhofr |
/*
|
2 |
|
|
* Copyright 2005 Stephane Marchesin.
|
3 |
|
|
* All Rights Reserved.
|
4 |
|
|
*
|
5 |
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
6 |
|
|
* copy of this software and associated documentation files (the "Software"),
|
7 |
|
|
* to deal in the Software without restriction, including without limitation
|
8 |
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
9 |
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
10 |
|
|
* Software is furnished to do so, subject to the following conditions:
|
11 |
|
|
*
|
12 |
|
|
* The above copyright notice and this permission notice (including the next
|
13 |
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
14 |
|
|
* Software.
|
15 |
|
|
*
|
16 |
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 |
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 |
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 |
|
|
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
20 |
|
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
21 |
|
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
22 |
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
23 |
|
|
*/
|
24 |
|
|
|
25 |
|
|
#ifndef __NOUVEAU_DRM_H__
|
26 |
|
|
#define __NOUVEAU_DRM_H__
|
27 |
|
|
|
28 |
|
|
#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0)
|
29 |
|
|
#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
|
30 |
|
|
#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
|
31 |
|
|
#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3)
|
32 |
|
|
|
33 |
|
|
#define NOUVEAU_GEM_TILE_COMP 0x00030000 /* nv50-only */
|
34 |
|
|
#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00
|
35 |
|
|
#define NOUVEAU_GEM_TILE_16BPP 0x00000001
|
36 |
|
|
#define NOUVEAU_GEM_TILE_32BPP 0x00000002
|
37 |
|
|
#define NOUVEAU_GEM_TILE_ZETA 0x00000004
|
38 |
|
|
#define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008
|
39 |
|
|
|
40 |
|
|
struct drm_nouveau_gem_info {
|
41 |
|
|
uint32_t handle;
|
42 |
|
|
uint32_t domain;
|
43 |
|
|
uint64_t size;
|
44 |
|
|
uint64_t offset;
|
45 |
|
|
uint64_t map_handle;
|
46 |
|
|
uint32_t tile_mode;
|
47 |
|
|
uint32_t tile_flags;
|
48 |
|
|
};
|
49 |
|
|
|
50 |
|
|
struct drm_nouveau_gem_new {
|
51 |
|
|
struct drm_nouveau_gem_info info;
|
52 |
|
|
uint32_t channel_hint;
|
53 |
|
|
uint32_t align;
|
54 |
|
|
};
|
55 |
|
|
|
56 |
|
|
#define NOUVEAU_GEM_MAX_BUFFERS 1024
|
57 |
|
|
struct drm_nouveau_gem_pushbuf_bo_presumed {
|
58 |
|
|
uint32_t valid;
|
59 |
|
|
uint32_t domain;
|
60 |
|
|
uint64_t offset;
|
61 |
|
|
};
|
62 |
|
|
|
63 |
|
|
struct drm_nouveau_gem_pushbuf_bo {
|
64 |
|
|
uint64_t user_priv;
|
65 |
|
|
uint32_t handle;
|
66 |
|
|
uint32_t read_domains;
|
67 |
|
|
uint32_t write_domains;
|
68 |
|
|
uint32_t valid_domains;
|
69 |
|
|
struct drm_nouveau_gem_pushbuf_bo_presumed presumed;
|
70 |
|
|
};
|
71 |
|
|
|
72 |
|
|
#define NOUVEAU_GEM_RELOC_LOW (1 << 0)
|
73 |
|
|
#define NOUVEAU_GEM_RELOC_HIGH (1 << 1)
|
74 |
|
|
#define NOUVEAU_GEM_RELOC_OR (1 << 2)
|
75 |
|
|
#define NOUVEAU_GEM_MAX_RELOCS 1024
|
76 |
|
|
struct drm_nouveau_gem_pushbuf_reloc {
|
77 |
|
|
uint32_t reloc_bo_index;
|
78 |
|
|
uint32_t reloc_bo_offset;
|
79 |
|
|
uint32_t bo_index;
|
80 |
|
|
uint32_t flags;
|
81 |
|
|
uint32_t data;
|
82 |
|
|
uint32_t vor;
|
83 |
|
|
uint32_t tor;
|
84 |
|
|
};
|
85 |
|
|
|
86 |
|
|
#define NOUVEAU_GEM_MAX_PUSH 512
|
87 |
|
|
struct drm_nouveau_gem_pushbuf_push {
|
88 |
|
|
uint32_t bo_index;
|
89 |
|
|
uint32_t pad;
|
90 |
|
|
uint64_t offset;
|
91 |
|
|
uint64_t length;
|
92 |
|
|
};
|
93 |
|
|
|
94 |
|
|
struct drm_nouveau_gem_pushbuf {
|
95 |
|
|
uint32_t channel;
|
96 |
|
|
uint32_t nr_buffers;
|
97 |
|
|
uint64_t buffers;
|
98 |
|
|
uint32_t nr_relocs;
|
99 |
|
|
uint32_t nr_push;
|
100 |
|
|
uint64_t relocs;
|
101 |
|
|
uint64_t push;
|
102 |
|
|
uint32_t suffix0;
|
103 |
|
|
uint32_t suffix1;
|
104 |
|
|
uint64_t vram_available;
|
105 |
|
|
uint64_t gart_available;
|
106 |
|
|
};
|
107 |
|
|
|
108 |
|
|
#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001
|
109 |
|
|
#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004
|
110 |
|
|
struct drm_nouveau_gem_cpu_prep {
|
111 |
|
|
uint32_t handle;
|
112 |
|
|
uint32_t flags;
|
113 |
|
|
};
|
114 |
|
|
|
115 |
|
|
struct drm_nouveau_gem_cpu_fini {
|
116 |
|
|
uint32_t handle;
|
117 |
|
|
};
|
118 |
|
|
|
119 |
|
|
#define DRM_NOUVEAU_GETPARAM 0x00 /* deprecated */
|
120 |
|
|
#define DRM_NOUVEAU_SETPARAM 0x01 /* deprecated */
|
121 |
|
|
#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02 /* deprecated */
|
122 |
|
|
#define DRM_NOUVEAU_CHANNEL_FREE 0x03 /* deprecated */
|
123 |
|
|
#define DRM_NOUVEAU_GROBJ_ALLOC 0x04 /* deprecated */
|
124 |
|
|
#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x05 /* deprecated */
|
125 |
|
|
#define DRM_NOUVEAU_GPUOBJ_FREE 0x06 /* deprecated */
|
126 |
|
|
#define DRM_NOUVEAU_GEM_NEW 0x40
|
127 |
|
|
#define DRM_NOUVEAU_GEM_PUSHBUF 0x41
|
128 |
|
|
#define DRM_NOUVEAU_GEM_CPU_PREP 0x42
|
129 |
|
|
#define DRM_NOUVEAU_GEM_CPU_FINI 0x43
|
130 |
|
|
#define DRM_NOUVEAU_GEM_INFO 0x44
|
131 |
|
|
|
132 |
|
|
#define DRM_IOCTL_NOUVEAU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new)
|
133 |
|
|
#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, struct drm_nouveau_gem_pushbuf)
|
134 |
|
|
#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep)
|
135 |
|
|
#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini)
|
136 |
|
|
#define DRM_IOCTL_NOUVEAU_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info)
|
137 |
|
|
|
138 |
|
|
#endif /* __NOUVEAU_DRM_H__ */
|