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[/] [hf-risc/] [trunk/] [tools/] [riscv-gnu-toolchain-master/] [linux-headers/] [include/] [drm/] [r128_drm.h] - Blame information for rev 13

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1 13 serginhofr
/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
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 * Created: Wed Apr  5 19:24:19 2000 by kevin@precisioninsight.com
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 */
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/*
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 * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
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 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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 * All rights reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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 * DEALINGS IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Gareth Hughes <gareth@valinux.com>
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 *    Kevin E. Martin <martin@valinux.com>
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 */
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#ifndef __R128_DRM_H__
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#define __R128_DRM_H__
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/* WARNING: If you change any of these defines, make sure to change the
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 * defines in the X server file (r128_sarea.h)
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 */
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#ifndef __R128_SAREA_DEFINES__
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#define __R128_SAREA_DEFINES__
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/* What needs to be changed for the current vertex buffer?
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 */
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#define R128_UPLOAD_CONTEXT             0x001
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#define R128_UPLOAD_SETUP               0x002
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#define R128_UPLOAD_TEX0                0x004
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#define R128_UPLOAD_TEX1                0x008
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#define R128_UPLOAD_TEX0IMAGES          0x010
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#define R128_UPLOAD_TEX1IMAGES          0x020
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#define R128_UPLOAD_CORE                0x040
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#define R128_UPLOAD_MASKS               0x080
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#define R128_UPLOAD_WINDOW              0x100
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#define R128_UPLOAD_CLIPRECTS           0x200   /* handled client-side */
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#define R128_REQUIRE_QUIESCENCE         0x400
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#define R128_UPLOAD_ALL                 0x7ff
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#define R128_FRONT                      0x1
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#define R128_BACK                       0x2
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#define R128_DEPTH                      0x4
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/* Primitive types
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 */
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#define R128_POINTS                     0x1
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#define R128_LINES                      0x2
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#define R128_LINE_STRIP                 0x3
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#define R128_TRIANGLES                  0x4
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#define R128_TRIANGLE_FAN               0x5
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#define R128_TRIANGLE_STRIP             0x6
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/* Vertex/indirect buffer size
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 */
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#define R128_BUFFER_SIZE                16384
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74
/* Byte offsets for indirect buffer data
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 */
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#define R128_INDEX_PRIM_OFFSET          20
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#define R128_HOSTDATA_BLIT_OFFSET       32
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/* Keep these small for testing.
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 */
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#define R128_NR_SAREA_CLIPRECTS         12
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/* There are 2 heaps (local/AGP).  Each region within a heap is a
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 *  minimum of 64k, and there are at most 64 of them per heap.
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 */
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#define R128_LOCAL_TEX_HEAP             0
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#define R128_AGP_TEX_HEAP               1
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#define R128_NR_TEX_HEAPS               2
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#define R128_NR_TEX_REGIONS             64
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#define R128_LOG_TEX_GRANULARITY        16
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92
#define R128_NR_CONTEXT_REGS            12
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94
#define R128_MAX_TEXTURE_LEVELS         11
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#define R128_MAX_TEXTURE_UNITS          2
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#endif                          /* __R128_SAREA_DEFINES__ */
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99
typedef struct {
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        /* Context state - can be written in one large chunk */
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        unsigned int dst_pitch_offset_c;
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        unsigned int dp_gui_master_cntl_c;
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        unsigned int sc_top_left_c;
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        unsigned int sc_bottom_right_c;
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        unsigned int z_offset_c;
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        unsigned int z_pitch_c;
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        unsigned int z_sten_cntl_c;
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        unsigned int tex_cntl_c;
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        unsigned int misc_3d_state_cntl_reg;
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        unsigned int texture_clr_cmp_clr_c;
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        unsigned int texture_clr_cmp_msk_c;
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        unsigned int fog_color_c;
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114
        /* Texture state */
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        unsigned int tex_size_pitch_c;
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        unsigned int constant_color_c;
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118
        /* Setup state */
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        unsigned int pm4_vc_fpu_setup;
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        unsigned int setup_cntl;
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        /* Mask state */
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        unsigned int dp_write_mask;
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        unsigned int sten_ref_mask_c;
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        unsigned int plane_3d_mask_c;
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127
        /* Window state */
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        unsigned int window_xy_offset;
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130
        /* Core state */
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        unsigned int scale_3d_cntl;
132
} drm_r128_context_regs_t;
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134
/* Setup registers for each texture unit
135
 */
136
typedef struct {
137
        unsigned int tex_cntl;
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        unsigned int tex_combine_cntl;
139
        unsigned int tex_size_pitch;
140
        unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
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        unsigned int tex_border_color;
142
} drm_r128_texture_regs_t;
143
 
144
typedef struct drm_r128_sarea {
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        /* The channel for communication of state information to the kernel
146
         * on firing a vertex buffer.
147
         */
148
        drm_r128_context_regs_t context_state;
149
        drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
150
        unsigned int dirty;
151
        unsigned int vertsize;
152
        unsigned int vc_format;
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154
        /* The current cliprects, or a subset thereof.
155
         */
156
        struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
157
        unsigned int nbox;
158
 
159
        /* Counters for client-side throttling of rendering clients.
160
         */
161
        unsigned int last_frame;
162
        unsigned int last_dispatch;
163
 
164
        struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
165
        unsigned int tex_age[R128_NR_TEX_HEAPS];
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        int ctx_owner;
167
        int pfAllowPageFlip;    /* number of 3d windows (0,1,2 or more) */
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        int pfCurrentPage;      /* which buffer is being displayed? */
169
} drm_r128_sarea_t;
170
 
171
/* WARNING: If you change any of these defines, make sure to change the
172
 * defines in the Xserver file (xf86drmR128.h)
173
 */
174
 
175
/* Rage 128 specific ioctls
176
 * The device specific ioctl range is 0x40 to 0x79.
177
 */
178
#define DRM_R128_INIT       0x00
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#define DRM_R128_CCE_START  0x01
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#define DRM_R128_CCE_STOP   0x02
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#define DRM_R128_CCE_RESET  0x03
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#define DRM_R128_CCE_IDLE   0x04
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/* 0x05 not used */
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#define DRM_R128_RESET      0x06
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#define DRM_R128_SWAP       0x07
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#define DRM_R128_CLEAR      0x08
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#define DRM_R128_VERTEX     0x09
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#define DRM_R128_INDICES    0x0a
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#define DRM_R128_BLIT       0x0b
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#define DRM_R128_DEPTH      0x0c
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#define DRM_R128_STIPPLE    0x0d
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/* 0x0e not used */
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#define DRM_R128_INDIRECT   0x0f
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#define DRM_R128_FULLSCREEN 0x10
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#define DRM_R128_CLEAR2     0x11
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#define DRM_R128_GETPARAM   0x12
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#define DRM_R128_FLIP       0x13
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199
#define DRM_IOCTL_R128_INIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
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#define DRM_IOCTL_R128_CCE_START  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_START)
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#define DRM_IOCTL_R128_CCE_STOP   DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
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#define DRM_IOCTL_R128_CCE_RESET  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
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#define DRM_IOCTL_R128_CCE_IDLE   DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
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/* 0x05 not used */
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#define DRM_IOCTL_R128_RESET      DRM_IO(  DRM_COMMAND_BASE + DRM_R128_RESET)
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#define DRM_IOCTL_R128_SWAP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_SWAP)
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#define DRM_IOCTL_R128_CLEAR      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
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#define DRM_IOCTL_R128_VERTEX     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
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#define DRM_IOCTL_R128_INDICES    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
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#define DRM_IOCTL_R128_BLIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
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#define DRM_IOCTL_R128_DEPTH      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
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#define DRM_IOCTL_R128_STIPPLE    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
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/* 0x0e not used */
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#define DRM_IOCTL_R128_INDIRECT   DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
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#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
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#define DRM_IOCTL_R128_CLEAR2     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
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#define DRM_IOCTL_R128_GETPARAM   DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
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#define DRM_IOCTL_R128_FLIP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_FLIP)
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typedef struct drm_r128_init {
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        enum {
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                R128_INIT_CCE = 0x01,
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                R128_CLEANUP_CCE = 0x02
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        } func;
225
        unsigned long sarea_priv_offset;
226
        int is_pci;
227
        int cce_mode;
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        int cce_secure;
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        int ring_size;
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        int usec_timeout;
231
 
232
        unsigned int fb_bpp;
233
        unsigned int front_offset, front_pitch;
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        unsigned int back_offset, back_pitch;
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        unsigned int depth_bpp;
236
        unsigned int depth_offset, depth_pitch;
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        unsigned int span_offset;
238
 
239
        unsigned long fb_offset;
240
        unsigned long mmio_offset;
241
        unsigned long ring_offset;
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        unsigned long ring_rptr_offset;
243
        unsigned long buffers_offset;
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        unsigned long agp_textures_offset;
245
} drm_r128_init_t;
246
 
247
typedef struct drm_r128_cce_stop {
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        int flush;
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        int idle;
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} drm_r128_cce_stop_t;
251
 
252
typedef struct drm_r128_clear {
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        unsigned int flags;
254
        unsigned int clear_color;
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        unsigned int clear_depth;
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        unsigned int color_mask;
257
        unsigned int depth_mask;
258
} drm_r128_clear_t;
259
 
260
typedef struct drm_r128_vertex {
261
        int prim;
262
        int idx;                /* Index of vertex buffer */
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        int count;              /* Number of vertices in buffer */
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        int discard;            /* Client finished with buffer? */
265
} drm_r128_vertex_t;
266
 
267
typedef struct drm_r128_indices {
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        int prim;
269
        int idx;
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        int start;
271
        int end;
272
        int discard;            /* Client finished with buffer? */
273
} drm_r128_indices_t;
274
 
275
typedef struct drm_r128_blit {
276
        int idx;
277
        int pitch;
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        int offset;
279
        int format;
280
        unsigned short x, y;
281
        unsigned short width, height;
282
} drm_r128_blit_t;
283
 
284
typedef struct drm_r128_depth {
285
        enum {
286
                R128_WRITE_SPAN = 0x01,
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                R128_WRITE_PIXELS = 0x02,
288
                R128_READ_SPAN = 0x03,
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                R128_READ_PIXELS = 0x04
290
        } func;
291
        int n;
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        int *x;
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        int *y;
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        unsigned int *buffer;
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        unsigned char *mask;
296
} drm_r128_depth_t;
297
 
298
typedef struct drm_r128_stipple {
299
        unsigned int *mask;
300
} drm_r128_stipple_t;
301
 
302
typedef struct drm_r128_indirect {
303
        int idx;
304
        int start;
305
        int end;
306
        int discard;
307
} drm_r128_indirect_t;
308
 
309
typedef struct drm_r128_fullscreen {
310
        enum {
311
                R128_INIT_FULLSCREEN = 0x01,
312
                R128_CLEANUP_FULLSCREEN = 0x02
313
        } func;
314
} drm_r128_fullscreen_t;
315
 
316
/* 2.3: An ioctl to get parameters that aren't available to the 3d
317
 * client any other way.
318
 */
319
#define R128_PARAM_IRQ_NR            1
320
 
321
typedef struct drm_r128_getparam {
322
        int param;
323
        void *value;
324
} drm_r128_getparam_t;
325
 
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#endif

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