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/**************************************************************************
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*
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* Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#ifndef __VMWGFX_DRM_H__
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#define __VMWGFX_DRM_H__
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#include <drm/drm.h>
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#define DRM_VMW_MAX_SURFACE_FACES 6
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#define DRM_VMW_MAX_MIP_LEVELS 24
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#define DRM_VMW_GET_PARAM 0
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#define DRM_VMW_ALLOC_DMABUF 1
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#define DRM_VMW_UNREF_DMABUF 2
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#define DRM_VMW_CURSOR_BYPASS 3
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/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
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#define DRM_VMW_CONTROL_STREAM 4
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#define DRM_VMW_CLAIM_STREAM 5
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#define DRM_VMW_UNREF_STREAM 6
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/* guarded by DRM_VMW_PARAM_3D == 1 */
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#define DRM_VMW_CREATE_CONTEXT 7
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#define DRM_VMW_UNREF_CONTEXT 8
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#define DRM_VMW_CREATE_SURFACE 9
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#define DRM_VMW_UNREF_SURFACE 10
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#define DRM_VMW_REF_SURFACE 11
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#define DRM_VMW_EXECBUF 12
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#define DRM_VMW_GET_3D_CAP 13
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#define DRM_VMW_FENCE_WAIT 14
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#define DRM_VMW_FENCE_SIGNALED 15
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#define DRM_VMW_FENCE_UNREF 16
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#define DRM_VMW_FENCE_EVENT 17
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#define DRM_VMW_PRESENT 18
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#define DRM_VMW_PRESENT_READBACK 19
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#define DRM_VMW_UPDATE_LAYOUT 20
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#define DRM_VMW_CREATE_SHADER 21
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#define DRM_VMW_UNREF_SHADER 22
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#define DRM_VMW_GB_SURFACE_CREATE 23
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#define DRM_VMW_GB_SURFACE_REF 24
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#define DRM_VMW_SYNCCPU 25
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/*************************************************************************/
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/**
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* DRM_VMW_GET_PARAM - get device information.
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*
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* DRM_VMW_PARAM_FIFO_OFFSET:
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* Offset to use to map the first page of the FIFO read-only.
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* The fifo is mapped using the mmap() system call on the drm device.
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*
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* DRM_VMW_PARAM_OVERLAY_IOCTL:
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* Does the driver support the overlay ioctl.
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*/
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#define DRM_VMW_PARAM_NUM_STREAMS 0
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#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
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#define DRM_VMW_PARAM_3D 2
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#define DRM_VMW_PARAM_HW_CAPS 3
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#define DRM_VMW_PARAM_FIFO_CAPS 4
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#define DRM_VMW_PARAM_MAX_FB_SIZE 5
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#define DRM_VMW_PARAM_FIFO_HW_VERSION 6
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#define DRM_VMW_PARAM_MAX_SURF_MEMORY 7
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#define DRM_VMW_PARAM_3D_CAPS_SIZE 8
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#define DRM_VMW_PARAM_MAX_MOB_MEMORY 9
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#define DRM_VMW_PARAM_MAX_MOB_SIZE 10
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/**
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* struct drm_vmw_getparam_arg
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*
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* @value: Returned value. //Out
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* @param: Parameter to query. //In.
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*
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* Argument to the DRM_VMW_GET_PARAM Ioctl.
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*/
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struct drm_vmw_getparam_arg {
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uint64_t value;
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uint32_t param;
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uint32_t pad64;
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};
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/*************************************************************************/
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/**
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* DRM_VMW_CREATE_CONTEXT - Create a host context.
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*
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* Allocates a device unique context id, and queues a create context command
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* for the host. Does not wait for host completion.
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*/
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/**
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* struct drm_vmw_context_arg
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*
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* @cid: Device unique context ID.
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*
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* Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
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* Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
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*/
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struct drm_vmw_context_arg {
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int32_t cid;
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uint32_t pad64;
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};
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/*************************************************************************/
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/**
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* DRM_VMW_UNREF_CONTEXT - Create a host context.
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*
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* Frees a global context id, and queues a destroy host command for the host.
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* Does not wait for host completion. The context ID can be used directly
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* in the command stream and shows up as the same context ID on the host.
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*/
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/*************************************************************************/
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/**
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* DRM_VMW_CREATE_SURFACE - Create a host suface.
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*
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* Allocates a device unique surface id, and queues a create surface command
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* for the host. Does not wait for host completion. The surface ID can be
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* used directly in the command stream and shows up as the same surface
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* ID on the host.
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*/
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/**
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* struct drm_wmv_surface_create_req
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*
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* @flags: Surface flags as understood by the host.
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* @format: Surface format as understood by the host.
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* @mip_levels: Number of mip levels for each face.
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* An unused face should have 0 encoded.
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* @size_addr: Address of a user-space array of sruct drm_vmw_size
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* cast to an uint64_t for 32-64 bit compatibility.
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* The size of the array should equal the total number of mipmap levels.
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* @shareable: Boolean whether other clients (as identified by file descriptors)
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* may reference this surface.
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* @scanout: Boolean whether the surface is intended to be used as a
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* scanout.
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*
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* Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
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* Output data from the DRM_VMW_REF_SURFACE Ioctl.
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*/
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struct drm_vmw_surface_create_req {
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uint32_t flags;
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uint32_t format;
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uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
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uint64_t size_addr;
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int32_t shareable;
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int32_t scanout;
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};
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/**
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* struct drm_wmv_surface_arg
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*
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* @sid: Surface id of created surface or surface to destroy or reference.
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*
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* Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
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* Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
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* Input argument to the DRM_VMW_REF_SURFACE Ioctl.
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*/
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struct drm_vmw_surface_arg {
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int32_t sid;
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uint32_t pad64;
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};
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/**
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* struct drm_vmw_size ioctl.
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*
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* @width - mip level width
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* @height - mip level height
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* @depth - mip level depth
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*
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* Description of a mip level.
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* Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
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*/
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struct drm_vmw_size {
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uint32_t width;
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uint32_t height;
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uint32_t depth;
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uint32_t pad64;
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};
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/**
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* union drm_vmw_surface_create_arg
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*
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* @rep: Output data as described above.
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* @req: Input data as described above.
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*
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* Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
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*/
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union drm_vmw_surface_create_arg {
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struct drm_vmw_surface_arg rep;
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struct drm_vmw_surface_create_req req;
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};
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/*************************************************************************/
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/**
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* DRM_VMW_REF_SURFACE - Reference a host surface.
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*
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* Puts a reference on a host surface with a give sid, as previously
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* returned by the DRM_VMW_CREATE_SURFACE ioctl.
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* A reference will make sure the surface isn't destroyed while we hold
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* it and will allow the calling client to use the surface ID in the command
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* stream.
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*
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* On successful return, the Ioctl returns the surface information given
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* in the DRM_VMW_CREATE_SURFACE ioctl.
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*/
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/**
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* union drm_vmw_surface_reference_arg
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*
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* @rep: Output data as described above.
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* @req: Input data as described above.
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*
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* Argument to the DRM_VMW_REF_SURFACE Ioctl.
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*/
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union drm_vmw_surface_reference_arg {
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struct drm_vmw_surface_create_req rep;
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struct drm_vmw_surface_arg req;
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};
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/*************************************************************************/
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/**
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* DRM_VMW_UNREF_SURFACE - Unreference a host surface.
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*
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* Clear a reference previously put on a host surface.
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* When all references are gone, including the one implicitly placed
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* on creation,
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* a destroy surface command will be queued for the host.
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* Does not wait for completion.
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*/
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/*************************************************************************/
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/**
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* DRM_VMW_EXECBUF
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*
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* Submit a command buffer for execution on the host, and return a
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* fence seqno that when signaled, indicates that the command buffer has
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* executed.
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*/
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/**
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* struct drm_vmw_execbuf_arg
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*
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* @commands: User-space address of a command buffer cast to an uint64_t.
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* @command-size: Size in bytes of the command buffer.
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* @throttle-us: Sleep until software is less than @throttle_us
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* microseconds ahead of hardware. The driver may round this value
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* to the nearest kernel tick.
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* @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
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* uint64_t.
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* @version: Allows expanding the execbuf ioctl parameters without breaking
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* backwards compatibility, since user-space will always tell the kernel
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* which version it uses.
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* @flags: Execbuf flags. None currently.
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*
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* Argument to the DRM_VMW_EXECBUF Ioctl.
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*/
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#define DRM_VMW_EXECBUF_VERSION 1
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struct drm_vmw_execbuf_arg {
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uint64_t commands;
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uint32_t command_size;
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uint32_t throttle_us;
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uint64_t fence_rep;
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uint32_t version;
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uint32_t flags;
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};
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/**
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* struct drm_vmw_fence_rep
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*
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* @handle: Fence object handle for fence associated with a command submission.
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* @mask: Fence flags relevant for this fence object.
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* @seqno: Fence sequence number in fifo. A fence object with a lower
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* seqno will signal the EXEC flag before a fence object with a higher
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* seqno. This can be used by user-space to avoid kernel calls to determine
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* whether a fence has signaled the EXEC flag. Note that @seqno will
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* wrap at 32-bit.
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* @passed_seqno: The highest seqno number processed by the hardware
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* so far. This can be used to mark user-space fence objects as signaled, and
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* to determine whether a fence seqno might be stale.
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* @error: This member should've been set to -EFAULT on submission.
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* The following actions should be take on completion:
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* error == -EFAULT: Fence communication failed. The host is synchronized.
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* Use the last fence id read from the FIFO fence register.
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* error != 0 && error != -EFAULT:
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* Fence submission failed. The host is synchronized. Use the fence_seq member.
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* error == 0: All is OK, The host may not be synchronized.
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* Use the fence_seq member.
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*
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* Input / Output data to the DRM_VMW_EXECBUF Ioctl.
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*/
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struct drm_vmw_fence_rep {
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uint32_t handle;
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uint32_t mask;
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uint32_t seqno;
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uint32_t passed_seqno;
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uint32_t pad64;
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int32_t error;
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};
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/*************************************************************************/
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/**
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* DRM_VMW_ALLOC_DMABUF
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*
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* Allocate a DMA buffer that is visible also to the host.
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* NOTE: The buffer is
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* identified by a handle and an offset, which are private to the guest, but
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* useable in the command stream. The guest kernel may translate these
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* and patch up the command stream accordingly. In the future, the offset may
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* be zero at all times, or it may disappear from the interface before it is
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* fixed.
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*
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* The DMA buffer may stay user-space mapped in the guest at all times,
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* and is thus suitable for sub-allocation.
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*
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* DMA buffers are mapped using the mmap() syscall on the drm device.
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*/
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/**
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* struct drm_vmw_alloc_dmabuf_req
|
352 |
|
|
*
|
353 |
|
|
* @size: Required minimum size of the buffer.
|
354 |
|
|
*
|
355 |
|
|
* Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
|
356 |
|
|
*/
|
357 |
|
|
|
358 |
|
|
struct drm_vmw_alloc_dmabuf_req {
|
359 |
|
|
uint32_t size;
|
360 |
|
|
uint32_t pad64;
|
361 |
|
|
};
|
362 |
|
|
|
363 |
|
|
/**
|
364 |
|
|
* struct drm_vmw_dmabuf_rep
|
365 |
|
|
*
|
366 |
|
|
* @map_handle: Offset to use in the mmap() call used to map the buffer.
|
367 |
|
|
* @handle: Handle unique to this buffer. Used for unreferencing.
|
368 |
|
|
* @cur_gmr_id: GMR id to use in the command stream when this buffer is
|
369 |
|
|
* referenced. See not above.
|
370 |
|
|
* @cur_gmr_offset: Offset to use in the command stream when this buffer is
|
371 |
|
|
* referenced. See note above.
|
372 |
|
|
*
|
373 |
|
|
* Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
|
374 |
|
|
*/
|
375 |
|
|
|
376 |
|
|
struct drm_vmw_dmabuf_rep {
|
377 |
|
|
uint64_t map_handle;
|
378 |
|
|
uint32_t handle;
|
379 |
|
|
uint32_t cur_gmr_id;
|
380 |
|
|
uint32_t cur_gmr_offset;
|
381 |
|
|
uint32_t pad64;
|
382 |
|
|
};
|
383 |
|
|
|
384 |
|
|
/**
|
385 |
|
|
* union drm_vmw_dmabuf_arg
|
386 |
|
|
*
|
387 |
|
|
* @req: Input data as described above.
|
388 |
|
|
* @rep: Output data as described above.
|
389 |
|
|
*
|
390 |
|
|
* Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
|
391 |
|
|
*/
|
392 |
|
|
|
393 |
|
|
union drm_vmw_alloc_dmabuf_arg {
|
394 |
|
|
struct drm_vmw_alloc_dmabuf_req req;
|
395 |
|
|
struct drm_vmw_dmabuf_rep rep;
|
396 |
|
|
};
|
397 |
|
|
|
398 |
|
|
/*************************************************************************/
|
399 |
|
|
/**
|
400 |
|
|
* DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
|
401 |
|
|
*
|
402 |
|
|
*/
|
403 |
|
|
|
404 |
|
|
/**
|
405 |
|
|
* struct drm_vmw_unref_dmabuf_arg
|
406 |
|
|
*
|
407 |
|
|
* @handle: Handle indicating what buffer to free. Obtained from the
|
408 |
|
|
* DRM_VMW_ALLOC_DMABUF Ioctl.
|
409 |
|
|
*
|
410 |
|
|
* Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
|
411 |
|
|
*/
|
412 |
|
|
|
413 |
|
|
struct drm_vmw_unref_dmabuf_arg {
|
414 |
|
|
uint32_t handle;
|
415 |
|
|
uint32_t pad64;
|
416 |
|
|
};
|
417 |
|
|
|
418 |
|
|
/*************************************************************************/
|
419 |
|
|
/**
|
420 |
|
|
* DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
|
421 |
|
|
*
|
422 |
|
|
* This IOCTL controls the overlay units of the svga device.
|
423 |
|
|
* The SVGA overlay units does not work like regular hardware units in
|
424 |
|
|
* that they do not automaticaly read back the contents of the given dma
|
425 |
|
|
* buffer. But instead only read back for each call to this ioctl, and
|
426 |
|
|
* at any point between this call being made and a following call that
|
427 |
|
|
* either changes the buffer or disables the stream.
|
428 |
|
|
*/
|
429 |
|
|
|
430 |
|
|
/**
|
431 |
|
|
* struct drm_vmw_rect
|
432 |
|
|
*
|
433 |
|
|
* Defines a rectangle. Used in the overlay ioctl to define
|
434 |
|
|
* source and destination rectangle.
|
435 |
|
|
*/
|
436 |
|
|
|
437 |
|
|
struct drm_vmw_rect {
|
438 |
|
|
int32_t x;
|
439 |
|
|
int32_t y;
|
440 |
|
|
uint32_t w;
|
441 |
|
|
uint32_t h;
|
442 |
|
|
};
|
443 |
|
|
|
444 |
|
|
/**
|
445 |
|
|
* struct drm_vmw_control_stream_arg
|
446 |
|
|
*
|
447 |
|
|
* @stream_id: Stearm to control
|
448 |
|
|
* @enabled: If false all following arguments are ignored.
|
449 |
|
|
* @handle: Handle to buffer for getting data from.
|
450 |
|
|
* @format: Format of the overlay as understood by the host.
|
451 |
|
|
* @width: Width of the overlay.
|
452 |
|
|
* @height: Height of the overlay.
|
453 |
|
|
* @size: Size of the overlay in bytes.
|
454 |
|
|
* @pitch: Array of pitches, the two last are only used for YUV12 formats.
|
455 |
|
|
* @offset: Offset from start of dma buffer to overlay.
|
456 |
|
|
* @src: Source rect, must be within the defined area above.
|
457 |
|
|
* @dst: Destination rect, x and y may be negative.
|
458 |
|
|
*
|
459 |
|
|
* Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
|
460 |
|
|
*/
|
461 |
|
|
|
462 |
|
|
struct drm_vmw_control_stream_arg {
|
463 |
|
|
uint32_t stream_id;
|
464 |
|
|
uint32_t enabled;
|
465 |
|
|
|
466 |
|
|
uint32_t flags;
|
467 |
|
|
uint32_t color_key;
|
468 |
|
|
|
469 |
|
|
uint32_t handle;
|
470 |
|
|
uint32_t offset;
|
471 |
|
|
int32_t format;
|
472 |
|
|
uint32_t size;
|
473 |
|
|
uint32_t width;
|
474 |
|
|
uint32_t height;
|
475 |
|
|
uint32_t pitch[3];
|
476 |
|
|
|
477 |
|
|
uint32_t pad64;
|
478 |
|
|
struct drm_vmw_rect src;
|
479 |
|
|
struct drm_vmw_rect dst;
|
480 |
|
|
};
|
481 |
|
|
|
482 |
|
|
/*************************************************************************/
|
483 |
|
|
/**
|
484 |
|
|
* DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
|
485 |
|
|
*
|
486 |
|
|
*/
|
487 |
|
|
|
488 |
|
|
#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
|
489 |
|
|
#define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
|
490 |
|
|
|
491 |
|
|
/**
|
492 |
|
|
* struct drm_vmw_cursor_bypass_arg
|
493 |
|
|
*
|
494 |
|
|
* @flags: Flags.
|
495 |
|
|
* @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
|
496 |
|
|
* @xpos: X position of cursor.
|
497 |
|
|
* @ypos: Y position of cursor.
|
498 |
|
|
* @xhot: X hotspot.
|
499 |
|
|
* @yhot: Y hotspot.
|
500 |
|
|
*
|
501 |
|
|
* Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
|
502 |
|
|
*/
|
503 |
|
|
|
504 |
|
|
struct drm_vmw_cursor_bypass_arg {
|
505 |
|
|
uint32_t flags;
|
506 |
|
|
uint32_t crtc_id;
|
507 |
|
|
int32_t xpos;
|
508 |
|
|
int32_t ypos;
|
509 |
|
|
int32_t xhot;
|
510 |
|
|
int32_t yhot;
|
511 |
|
|
};
|
512 |
|
|
|
513 |
|
|
/*************************************************************************/
|
514 |
|
|
/**
|
515 |
|
|
* DRM_VMW_CLAIM_STREAM - Claim a single stream.
|
516 |
|
|
*/
|
517 |
|
|
|
518 |
|
|
/**
|
519 |
|
|
* struct drm_vmw_context_arg
|
520 |
|
|
*
|
521 |
|
|
* @stream_id: Device unique context ID.
|
522 |
|
|
*
|
523 |
|
|
* Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
|
524 |
|
|
* Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
|
525 |
|
|
*/
|
526 |
|
|
|
527 |
|
|
struct drm_vmw_stream_arg {
|
528 |
|
|
uint32_t stream_id;
|
529 |
|
|
uint32_t pad64;
|
530 |
|
|
};
|
531 |
|
|
|
532 |
|
|
/*************************************************************************/
|
533 |
|
|
/**
|
534 |
|
|
* DRM_VMW_UNREF_STREAM - Unclaim a stream.
|
535 |
|
|
*
|
536 |
|
|
* Return a single stream that was claimed by this process. Also makes
|
537 |
|
|
* sure that the stream has been stopped.
|
538 |
|
|
*/
|
539 |
|
|
|
540 |
|
|
/*************************************************************************/
|
541 |
|
|
/**
|
542 |
|
|
* DRM_VMW_GET_3D_CAP
|
543 |
|
|
*
|
544 |
|
|
* Read 3D capabilities from the FIFO
|
545 |
|
|
*
|
546 |
|
|
*/
|
547 |
|
|
|
548 |
|
|
/**
|
549 |
|
|
* struct drm_vmw_get_3d_cap_arg
|
550 |
|
|
*
|
551 |
|
|
* @buffer: Pointer to a buffer for capability data, cast to an uint64_t
|
552 |
|
|
* @size: Max size to copy
|
553 |
|
|
*
|
554 |
|
|
* Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
|
555 |
|
|
* ioctls.
|
556 |
|
|
*/
|
557 |
|
|
|
558 |
|
|
struct drm_vmw_get_3d_cap_arg {
|
559 |
|
|
uint64_t buffer;
|
560 |
|
|
uint32_t max_size;
|
561 |
|
|
uint32_t pad64;
|
562 |
|
|
};
|
563 |
|
|
|
564 |
|
|
/*************************************************************************/
|
565 |
|
|
/**
|
566 |
|
|
* DRM_VMW_FENCE_WAIT
|
567 |
|
|
*
|
568 |
|
|
* Waits for a fence object to signal. The wait is interruptible, so that
|
569 |
|
|
* signals may be delivered during the interrupt. The wait may timeout,
|
570 |
|
|
* in which case the calls returns -EBUSY. If the wait is restarted,
|
571 |
|
|
* that is restarting without resetting @cookie_valid to zero,
|
572 |
|
|
* the timeout is computed from the first call.
|
573 |
|
|
*
|
574 |
|
|
* The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
|
575 |
|
|
* on:
|
576 |
|
|
* DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
|
577 |
|
|
* stream
|
578 |
|
|
* have executed.
|
579 |
|
|
* DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
|
580 |
|
|
* commands
|
581 |
|
|
* in the buffer given to the EXECBUF ioctl returning the fence object handle
|
582 |
|
|
* are available to user-space.
|
583 |
|
|
*
|
584 |
|
|
* DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
|
585 |
|
|
* fenc wait ioctl returns 0, the fence object has been unreferenced after
|
586 |
|
|
* the wait.
|
587 |
|
|
*/
|
588 |
|
|
|
589 |
|
|
#define DRM_VMW_FENCE_FLAG_EXEC (1 << 0)
|
590 |
|
|
#define DRM_VMW_FENCE_FLAG_QUERY (1 << 1)
|
591 |
|
|
|
592 |
|
|
#define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
|
593 |
|
|
|
594 |
|
|
/**
|
595 |
|
|
* struct drm_vmw_fence_wait_arg
|
596 |
|
|
*
|
597 |
|
|
* @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
|
598 |
|
|
* @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
|
599 |
|
|
* @kernel_cookie: Set to 0 on first call. Left alone on restart.
|
600 |
|
|
* @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
|
601 |
|
|
* @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
|
602 |
|
|
* before returning.
|
603 |
|
|
* @flags: Fence flags to wait on.
|
604 |
|
|
* @wait_options: Options that control the behaviour of the wait ioctl.
|
605 |
|
|
*
|
606 |
|
|
* Input argument to the DRM_VMW_FENCE_WAIT ioctl.
|
607 |
|
|
*/
|
608 |
|
|
|
609 |
|
|
struct drm_vmw_fence_wait_arg {
|
610 |
|
|
uint32_t handle;
|
611 |
|
|
int32_t cookie_valid;
|
612 |
|
|
uint64_t kernel_cookie;
|
613 |
|
|
uint64_t timeout_us;
|
614 |
|
|
int32_t lazy;
|
615 |
|
|
int32_t flags;
|
616 |
|
|
int32_t wait_options;
|
617 |
|
|
int32_t pad64;
|
618 |
|
|
};
|
619 |
|
|
|
620 |
|
|
/*************************************************************************/
|
621 |
|
|
/**
|
622 |
|
|
* DRM_VMW_FENCE_SIGNALED
|
623 |
|
|
*
|
624 |
|
|
* Checks if a fence object is signaled..
|
625 |
|
|
*/
|
626 |
|
|
|
627 |
|
|
/**
|
628 |
|
|
* struct drm_vmw_fence_signaled_arg
|
629 |
|
|
*
|
630 |
|
|
* @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
|
631 |
|
|
* @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
|
632 |
|
|
* @signaled: Out: Flags signaled.
|
633 |
|
|
* @sequence: Out: Highest sequence passed so far. Can be used to signal the
|
634 |
|
|
* EXEC flag of user-space fence objects.
|
635 |
|
|
*
|
636 |
|
|
* Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
|
637 |
|
|
* ioctls.
|
638 |
|
|
*/
|
639 |
|
|
|
640 |
|
|
struct drm_vmw_fence_signaled_arg {
|
641 |
|
|
uint32_t handle;
|
642 |
|
|
uint32_t flags;
|
643 |
|
|
int32_t signaled;
|
644 |
|
|
uint32_t passed_seqno;
|
645 |
|
|
uint32_t signaled_flags;
|
646 |
|
|
uint32_t pad64;
|
647 |
|
|
};
|
648 |
|
|
|
649 |
|
|
/*************************************************************************/
|
650 |
|
|
/**
|
651 |
|
|
* DRM_VMW_FENCE_UNREF
|
652 |
|
|
*
|
653 |
|
|
* Unreferences a fence object, and causes it to be destroyed if there are no
|
654 |
|
|
* other references to it.
|
655 |
|
|
*
|
656 |
|
|
*/
|
657 |
|
|
|
658 |
|
|
/**
|
659 |
|
|
* struct drm_vmw_fence_arg
|
660 |
|
|
*
|
661 |
|
|
* @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
|
662 |
|
|
*
|
663 |
|
|
* Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
|
664 |
|
|
*/
|
665 |
|
|
|
666 |
|
|
struct drm_vmw_fence_arg {
|
667 |
|
|
uint32_t handle;
|
668 |
|
|
uint32_t pad64;
|
669 |
|
|
};
|
670 |
|
|
|
671 |
|
|
|
672 |
|
|
/*************************************************************************/
|
673 |
|
|
/**
|
674 |
|
|
* DRM_VMW_FENCE_EVENT
|
675 |
|
|
*
|
676 |
|
|
* Queues an event on a fence to be delivered on the drm character device
|
677 |
|
|
* when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
|
678 |
|
|
* Optionally the approximate time when the fence signaled is
|
679 |
|
|
* given by the event.
|
680 |
|
|
*/
|
681 |
|
|
|
682 |
|
|
/*
|
683 |
|
|
* The event type
|
684 |
|
|
*/
|
685 |
|
|
#define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
|
686 |
|
|
|
687 |
|
|
struct drm_vmw_event_fence {
|
688 |
|
|
struct drm_event base;
|
689 |
|
|
uint64_t user_data;
|
690 |
|
|
uint32_t tv_sec;
|
691 |
|
|
uint32_t tv_usec;
|
692 |
|
|
};
|
693 |
|
|
|
694 |
|
|
/*
|
695 |
|
|
* Flags that may be given to the command.
|
696 |
|
|
*/
|
697 |
|
|
/* Request fence signaled time on the event. */
|
698 |
|
|
#define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
|
699 |
|
|
|
700 |
|
|
/**
|
701 |
|
|
* struct drm_vmw_fence_event_arg
|
702 |
|
|
*
|
703 |
|
|
* @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
|
704 |
|
|
* the fence is not supposed to be referenced by user-space.
|
705 |
|
|
* @user_info: Info to be delivered with the event.
|
706 |
|
|
* @handle: Attach the event to this fence only.
|
707 |
|
|
* @flags: A set of flags as defined above.
|
708 |
|
|
*/
|
709 |
|
|
struct drm_vmw_fence_event_arg {
|
710 |
|
|
uint64_t fence_rep;
|
711 |
|
|
uint64_t user_data;
|
712 |
|
|
uint32_t handle;
|
713 |
|
|
uint32_t flags;
|
714 |
|
|
};
|
715 |
|
|
|
716 |
|
|
|
717 |
|
|
/*************************************************************************/
|
718 |
|
|
/**
|
719 |
|
|
* DRM_VMW_PRESENT
|
720 |
|
|
*
|
721 |
|
|
* Executes an SVGA present on a given fb for a given surface. The surface
|
722 |
|
|
* is placed on the framebuffer. Cliprects are given relative to the given
|
723 |
|
|
* point (the point disignated by dest_{x|y}).
|
724 |
|
|
*
|
725 |
|
|
*/
|
726 |
|
|
|
727 |
|
|
/**
|
728 |
|
|
* struct drm_vmw_present_arg
|
729 |
|
|
* @fb_id: framebuffer id to present / read back from.
|
730 |
|
|
* @sid: Surface id to present from.
|
731 |
|
|
* @dest_x: X placement coordinate for surface.
|
732 |
|
|
* @dest_y: Y placement coordinate for surface.
|
733 |
|
|
* @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
|
734 |
|
|
* @num_clips: Number of cliprects given relative to the framebuffer origin,
|
735 |
|
|
* in the same coordinate space as the frame buffer.
|
736 |
|
|
* @pad64: Unused 64-bit padding.
|
737 |
|
|
*
|
738 |
|
|
* Input argument to the DRM_VMW_PRESENT ioctl.
|
739 |
|
|
*/
|
740 |
|
|
|
741 |
|
|
struct drm_vmw_present_arg {
|
742 |
|
|
uint32_t fb_id;
|
743 |
|
|
uint32_t sid;
|
744 |
|
|
int32_t dest_x;
|
745 |
|
|
int32_t dest_y;
|
746 |
|
|
uint64_t clips_ptr;
|
747 |
|
|
uint32_t num_clips;
|
748 |
|
|
uint32_t pad64;
|
749 |
|
|
};
|
750 |
|
|
|
751 |
|
|
|
752 |
|
|
/*************************************************************************/
|
753 |
|
|
/**
|
754 |
|
|
* DRM_VMW_PRESENT_READBACK
|
755 |
|
|
*
|
756 |
|
|
* Executes an SVGA present readback from a given fb to the dma buffer
|
757 |
|
|
* currently bound as the fb. If there is no dma buffer bound to the fb,
|
758 |
|
|
* an error will be returned.
|
759 |
|
|
*
|
760 |
|
|
*/
|
761 |
|
|
|
762 |
|
|
/**
|
763 |
|
|
* struct drm_vmw_present_arg
|
764 |
|
|
* @fb_id: fb_id to present / read back from.
|
765 |
|
|
* @num_clips: Number of cliprects.
|
766 |
|
|
* @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
|
767 |
|
|
* @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
|
768 |
|
|
* If this member is NULL, then the ioctl should not return a fence.
|
769 |
|
|
*/
|
770 |
|
|
|
771 |
|
|
struct drm_vmw_present_readback_arg {
|
772 |
|
|
uint32_t fb_id;
|
773 |
|
|
uint32_t num_clips;
|
774 |
|
|
uint64_t clips_ptr;
|
775 |
|
|
uint64_t fence_rep;
|
776 |
|
|
};
|
777 |
|
|
|
778 |
|
|
/*************************************************************************/
|
779 |
|
|
/**
|
780 |
|
|
* DRM_VMW_UPDATE_LAYOUT - Update layout
|
781 |
|
|
*
|
782 |
|
|
* Updates the preferred modes and connection status for connectors. The
|
783 |
|
|
* command consists of one drm_vmw_update_layout_arg pointing to an array
|
784 |
|
|
* of num_outputs drm_vmw_rect's.
|
785 |
|
|
*/
|
786 |
|
|
|
787 |
|
|
/**
|
788 |
|
|
* struct drm_vmw_update_layout_arg
|
789 |
|
|
*
|
790 |
|
|
* @num_outputs: number of active connectors
|
791 |
|
|
* @rects: pointer to array of drm_vmw_rect cast to an uint64_t
|
792 |
|
|
*
|
793 |
|
|
* Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
|
794 |
|
|
*/
|
795 |
|
|
struct drm_vmw_update_layout_arg {
|
796 |
|
|
uint32_t num_outputs;
|
797 |
|
|
uint32_t pad64;
|
798 |
|
|
uint64_t rects;
|
799 |
|
|
};
|
800 |
|
|
|
801 |
|
|
|
802 |
|
|
/*************************************************************************/
|
803 |
|
|
/**
|
804 |
|
|
* DRM_VMW_CREATE_SHADER - Create shader
|
805 |
|
|
*
|
806 |
|
|
* Creates a shader and optionally binds it to a dma buffer containing
|
807 |
|
|
* the shader byte-code.
|
808 |
|
|
*/
|
809 |
|
|
|
810 |
|
|
/**
|
811 |
|
|
* enum drm_vmw_shader_type - Shader types
|
812 |
|
|
*/
|
813 |
|
|
enum drm_vmw_shader_type {
|
814 |
|
|
drm_vmw_shader_type_vs = 0,
|
815 |
|
|
drm_vmw_shader_type_ps,
|
816 |
|
|
drm_vmw_shader_type_gs
|
817 |
|
|
};
|
818 |
|
|
|
819 |
|
|
|
820 |
|
|
/**
|
821 |
|
|
* struct drm_vmw_shader_create_arg
|
822 |
|
|
*
|
823 |
|
|
* @shader_type: Shader type of the shader to create.
|
824 |
|
|
* @size: Size of the byte-code in bytes.
|
825 |
|
|
* where the shader byte-code starts
|
826 |
|
|
* @buffer_handle: Buffer handle identifying the buffer containing the
|
827 |
|
|
* shader byte-code
|
828 |
|
|
* @shader_handle: On successful completion contains a handle that
|
829 |
|
|
* can be used to subsequently identify the shader.
|
830 |
|
|
* @offset: Offset in bytes into the buffer given by @buffer_handle,
|
831 |
|
|
*
|
832 |
|
|
* Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl.
|
833 |
|
|
*/
|
834 |
|
|
struct drm_vmw_shader_create_arg {
|
835 |
|
|
enum drm_vmw_shader_type shader_type;
|
836 |
|
|
uint32_t size;
|
837 |
|
|
uint32_t buffer_handle;
|
838 |
|
|
uint32_t shader_handle;
|
839 |
|
|
uint64_t offset;
|
840 |
|
|
};
|
841 |
|
|
|
842 |
|
|
/*************************************************************************/
|
843 |
|
|
/**
|
844 |
|
|
* DRM_VMW_UNREF_SHADER - Unreferences a shader
|
845 |
|
|
*
|
846 |
|
|
* Destroys a user-space reference to a shader, optionally destroying
|
847 |
|
|
* it.
|
848 |
|
|
*/
|
849 |
|
|
|
850 |
|
|
/**
|
851 |
|
|
* struct drm_vmw_shader_arg
|
852 |
|
|
*
|
853 |
|
|
* @handle: Handle identifying the shader to destroy.
|
854 |
|
|
*
|
855 |
|
|
* Input argument to the DRM_VMW_UNREF_SHADER ioctl.
|
856 |
|
|
*/
|
857 |
|
|
struct drm_vmw_shader_arg {
|
858 |
|
|
uint32_t handle;
|
859 |
|
|
uint32_t pad64;
|
860 |
|
|
};
|
861 |
|
|
|
862 |
|
|
/*************************************************************************/
|
863 |
|
|
/**
|
864 |
|
|
* DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface.
|
865 |
|
|
*
|
866 |
|
|
* Allocates a surface handle and queues a create surface command
|
867 |
|
|
* for the host on the first use of the surface. The surface ID can
|
868 |
|
|
* be used as the surface ID in commands referencing the surface.
|
869 |
|
|
*/
|
870 |
|
|
|
871 |
|
|
/**
|
872 |
|
|
* enum drm_vmw_surface_flags
|
873 |
|
|
*
|
874 |
|
|
* @drm_vmw_surface_flag_shareable: Whether the surface is shareable
|
875 |
|
|
* @drm_vmw_surface_flag_scanout: Whether the surface is a scanout
|
876 |
|
|
* surface.
|
877 |
|
|
* @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is
|
878 |
|
|
* given.
|
879 |
|
|
*/
|
880 |
|
|
enum drm_vmw_surface_flags {
|
881 |
|
|
drm_vmw_surface_flag_shareable = (1 << 0),
|
882 |
|
|
drm_vmw_surface_flag_scanout = (1 << 1),
|
883 |
|
|
drm_vmw_surface_flag_create_buffer = (1 << 2)
|
884 |
|
|
};
|
885 |
|
|
|
886 |
|
|
/**
|
887 |
|
|
* struct drm_vmw_gb_surface_create_req
|
888 |
|
|
*
|
889 |
|
|
* @svga3d_flags: SVGA3d surface flags for the device.
|
890 |
|
|
* @format: SVGA3d format.
|
891 |
|
|
* @mip_level: Number of mip levels for all faces.
|
892 |
|
|
* @drm_surface_flags Flags as described above.
|
893 |
|
|
* @multisample_count Future use. Set to 0.
|
894 |
|
|
* @autogen_filter Future use. Set to 0.
|
895 |
|
|
* @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID
|
896 |
|
|
* if none.
|
897 |
|
|
* @base_size Size of the base mip level for all faces.
|
898 |
|
|
*
|
899 |
|
|
* Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl.
|
900 |
|
|
* Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl.
|
901 |
|
|
*/
|
902 |
|
|
struct drm_vmw_gb_surface_create_req {
|
903 |
|
|
uint32_t svga3d_flags;
|
904 |
|
|
uint32_t format;
|
905 |
|
|
uint32_t mip_levels;
|
906 |
|
|
enum drm_vmw_surface_flags drm_surface_flags;
|
907 |
|
|
uint32_t multisample_count;
|
908 |
|
|
uint32_t autogen_filter;
|
909 |
|
|
uint32_t buffer_handle;
|
910 |
|
|
uint32_t pad64;
|
911 |
|
|
struct drm_vmw_size base_size;
|
912 |
|
|
};
|
913 |
|
|
|
914 |
|
|
/**
|
915 |
|
|
* struct drm_vmw_gb_surface_create_rep
|
916 |
|
|
*
|
917 |
|
|
* @handle: Surface handle.
|
918 |
|
|
* @backup_size: Size of backup buffers for this surface.
|
919 |
|
|
* @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none.
|
920 |
|
|
* @buffer_size: Actual size of the buffer identified by
|
921 |
|
|
* @buffer_handle
|
922 |
|
|
* @buffer_map_handle: Offset into device address space for the buffer
|
923 |
|
|
* identified by @buffer_handle.
|
924 |
|
|
*
|
925 |
|
|
* Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl.
|
926 |
|
|
* Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl.
|
927 |
|
|
*/
|
928 |
|
|
struct drm_vmw_gb_surface_create_rep {
|
929 |
|
|
uint32_t handle;
|
930 |
|
|
uint32_t backup_size;
|
931 |
|
|
uint32_t buffer_handle;
|
932 |
|
|
uint32_t buffer_size;
|
933 |
|
|
uint64_t buffer_map_handle;
|
934 |
|
|
};
|
935 |
|
|
|
936 |
|
|
/**
|
937 |
|
|
* union drm_vmw_gb_surface_create_arg
|
938 |
|
|
*
|
939 |
|
|
* @req: Input argument as described above.
|
940 |
|
|
* @rep: Output argument as described above.
|
941 |
|
|
*
|
942 |
|
|
* Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl.
|
943 |
|
|
*/
|
944 |
|
|
union drm_vmw_gb_surface_create_arg {
|
945 |
|
|
struct drm_vmw_gb_surface_create_rep rep;
|
946 |
|
|
struct drm_vmw_gb_surface_create_req req;
|
947 |
|
|
};
|
948 |
|
|
|
949 |
|
|
/*************************************************************************/
|
950 |
|
|
/**
|
951 |
|
|
* DRM_VMW_GB_SURFACE_REF - Reference a host surface.
|
952 |
|
|
*
|
953 |
|
|
* Puts a reference on a host surface with a given handle, as previously
|
954 |
|
|
* returned by the DRM_VMW_GB_SURFACE_CREATE ioctl.
|
955 |
|
|
* A reference will make sure the surface isn't destroyed while we hold
|
956 |
|
|
* it and will allow the calling client to use the surface handle in
|
957 |
|
|
* the command stream.
|
958 |
|
|
*
|
959 |
|
|
* On successful return, the Ioctl returns the surface information given
|
960 |
|
|
* to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl.
|
961 |
|
|
*/
|
962 |
|
|
|
963 |
|
|
/**
|
964 |
|
|
* struct drm_vmw_gb_surface_reference_arg
|
965 |
|
|
*
|
966 |
|
|
* @creq: The data used as input when the surface was created, as described
|
967 |
|
|
* above at "struct drm_vmw_gb_surface_create_req"
|
968 |
|
|
* @crep: Additional data output when the surface was created, as described
|
969 |
|
|
* above at "struct drm_vmw_gb_surface_create_rep"
|
970 |
|
|
*
|
971 |
|
|
* Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl.
|
972 |
|
|
*/
|
973 |
|
|
struct drm_vmw_gb_surface_ref_rep {
|
974 |
|
|
struct drm_vmw_gb_surface_create_req creq;
|
975 |
|
|
struct drm_vmw_gb_surface_create_rep crep;
|
976 |
|
|
};
|
977 |
|
|
|
978 |
|
|
/**
|
979 |
|
|
* union drm_vmw_gb_surface_reference_arg
|
980 |
|
|
*
|
981 |
|
|
* @req: Input data as described above at "struct drm_vmw_surface_arg"
|
982 |
|
|
* @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep"
|
983 |
|
|
*
|
984 |
|
|
* Argument to the DRM_VMW_GB_SURFACE_REF Ioctl.
|
985 |
|
|
*/
|
986 |
|
|
union drm_vmw_gb_surface_reference_arg {
|
987 |
|
|
struct drm_vmw_gb_surface_ref_rep rep;
|
988 |
|
|
struct drm_vmw_surface_arg req;
|
989 |
|
|
};
|
990 |
|
|
|
991 |
|
|
|
992 |
|
|
/*************************************************************************/
|
993 |
|
|
/**
|
994 |
|
|
* DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access.
|
995 |
|
|
*
|
996 |
|
|
* Idles any previously submitted GPU operations on the buffer and
|
997 |
|
|
* by default blocks command submissions that reference the buffer.
|
998 |
|
|
* If the file descriptor used to grab a blocking CPU sync is closed, the
|
999 |
|
|
* cpu sync is released.
|
1000 |
|
|
* The flags argument indicates how the grab / release operation should be
|
1001 |
|
|
* performed:
|
1002 |
|
|
*/
|
1003 |
|
|
|
1004 |
|
|
/**
|
1005 |
|
|
* enum drm_vmw_synccpu_flags - Synccpu flags:
|
1006 |
|
|
*
|
1007 |
|
|
* @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a
|
1008 |
|
|
* hint to the kernel to allow command submissions that references the buffer
|
1009 |
|
|
* for read-only.
|
1010 |
|
|
* @drm_vmw_synccpu_write: Sync for write. Block all command submissions
|
1011 |
|
|
* referencing this buffer.
|
1012 |
|
|
* @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
|
1013 |
|
|
* -EBUSY should the buffer be busy.
|
1014 |
|
|
* @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
|
1015 |
|
|
* while the buffer is synced for CPU. This is similar to the GEM bo idle
|
1016 |
|
|
* behavior.
|
1017 |
|
|
*/
|
1018 |
|
|
enum drm_vmw_synccpu_flags {
|
1019 |
|
|
drm_vmw_synccpu_read = (1 << 0),
|
1020 |
|
|
drm_vmw_synccpu_write = (1 << 1),
|
1021 |
|
|
drm_vmw_synccpu_dontblock = (1 << 2),
|
1022 |
|
|
drm_vmw_synccpu_allow_cs = (1 << 3)
|
1023 |
|
|
};
|
1024 |
|
|
|
1025 |
|
|
/**
|
1026 |
|
|
* enum drm_vmw_synccpu_op - Synccpu operations:
|
1027 |
|
|
*
|
1028 |
|
|
* @drm_vmw_synccpu_grab: Grab the buffer for CPU operations
|
1029 |
|
|
* @drm_vmw_synccpu_release: Release a previous grab.
|
1030 |
|
|
*/
|
1031 |
|
|
enum drm_vmw_synccpu_op {
|
1032 |
|
|
drm_vmw_synccpu_grab,
|
1033 |
|
|
drm_vmw_synccpu_release
|
1034 |
|
|
};
|
1035 |
|
|
|
1036 |
|
|
/**
|
1037 |
|
|
* struct drm_vmw_synccpu_arg
|
1038 |
|
|
*
|
1039 |
|
|
* @op: The synccpu operation as described above.
|
1040 |
|
|
* @handle: Handle identifying the buffer object.
|
1041 |
|
|
* @flags: Flags as described above.
|
1042 |
|
|
*/
|
1043 |
|
|
struct drm_vmw_synccpu_arg {
|
1044 |
|
|
enum drm_vmw_synccpu_op op;
|
1045 |
|
|
enum drm_vmw_synccpu_flags flags;
|
1046 |
|
|
uint32_t handle;
|
1047 |
|
|
uint32_t pad64;
|
1048 |
|
|
};
|
1049 |
|
|
|
1050 |
|
|
#endif
|