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[/] [hf-risc/] [trunk/] [tools/] [riscv-gnu-toolchain-master/] [linux-headers/] [include/] [linux/] [spi/] [spidev.h] - Blame information for rev 13

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1 13 serginhofr
/*
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 * include/linux/spi/spidev.h
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 *
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 * Copyright (C) 2006 SWAPP
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 *      Andrea Paterniani <a.paterniani@swapp-eng.it>
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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  */
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#ifndef SPIDEV_H
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#define SPIDEV_H
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#include <linux/types.h>
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/* User space versions of kernel symbols for SPI clocking modes,
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 * matching <linux/spi/spi.h>
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 */
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#define SPI_CPHA                0x01
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#define SPI_CPOL                0x02
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#define SPI_MODE_0              (0|0)
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#define SPI_MODE_1              (0|SPI_CPHA)
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#define SPI_MODE_2              (SPI_CPOL|0)
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#define SPI_MODE_3              (SPI_CPOL|SPI_CPHA)
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#define SPI_CS_HIGH             0x04
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#define SPI_LSB_FIRST           0x08
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#define SPI_3WIRE               0x10
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#define SPI_LOOP                0x20
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#define SPI_NO_CS               0x40
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#define SPI_READY               0x80
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/*---------------------------------------------------------------------------*/
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/* IOCTL commands */
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#define SPI_IOC_MAGIC                   'k'
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/**
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 * struct spi_ioc_transfer - describes a single SPI transfer
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 * @tx_buf: Holds pointer to userspace buffer with transmit data, or null.
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 *      If no data is provided, zeroes are shifted out.
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 * @rx_buf: Holds pointer to userspace buffer for receive data, or null.
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 * @len: Length of tx and rx buffers, in bytes.
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 * @speed_hz: Temporary override of the device's bitrate.
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 * @bits_per_word: Temporary override of the device's wordsize.
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 * @delay_usecs: If nonzero, how long to delay after the last bit transfer
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 *      before optionally deselecting the device before the next transfer.
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 * @cs_change: True to deselect device before starting the next transfer.
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 *
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 * This structure is mapped directly to the kernel spi_transfer structure;
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 * the fields have the same meanings, except of course that the pointers
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 * are in a different address space (and may be of different sizes in some
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 * cases, such as 32-bit i386 userspace over a 64-bit x86_64 kernel).
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 * Zero-initialize the structure, including currently unused fields, to
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 * accommodate potential future updates.
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 *
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 * SPI_IOC_MESSAGE gives userspace the equivalent of kernel spi_sync().
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 * Pass it an array of related transfers, they'll execute together.
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 * Each transfer may be half duplex (either direction) or full duplex.
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 *
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 *      struct spi_ioc_transfer mesg[4];
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 *      ...
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 *      status = ioctl(fd, SPI_IOC_MESSAGE(4), mesg);
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 *
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 * So for example one transfer might send a nine bit command (right aligned
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 * in a 16-bit word), the next could read a block of 8-bit data before
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 * terminating that command by temporarily deselecting the chip; the next
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 * could send a different nine bit command (re-selecting the chip), and the
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 * last transfer might write some register values.
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 */
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struct spi_ioc_transfer {
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        __u64           tx_buf;
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        __u64           rx_buf;
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        __u32           len;
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        __u32           speed_hz;
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        __u16           delay_usecs;
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        __u8            bits_per_word;
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        __u8            cs_change;
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        __u32           pad;
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        /* If the contents of 'struct spi_ioc_transfer' ever change
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         * incompatibly, then the ioctl number (currently 0) must change;
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         * ioctls with constant size fields get a bit more in the way of
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         * error checking than ones (like this) where that field varies.
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         *
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         * NOTE: struct layout is the same in 64bit and 32bit userspace.
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         */
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};
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/* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */
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#define SPI_MSGSIZE(N) \
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        ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \
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                ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0)
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#define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
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/* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) */
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#define SPI_IOC_RD_MODE                 _IOR(SPI_IOC_MAGIC, 1, __u8)
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#define SPI_IOC_WR_MODE                 _IOW(SPI_IOC_MAGIC, 1, __u8)
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/* Read / Write SPI bit justification */
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#define SPI_IOC_RD_LSB_FIRST            _IOR(SPI_IOC_MAGIC, 2, __u8)
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#define SPI_IOC_WR_LSB_FIRST            _IOW(SPI_IOC_MAGIC, 2, __u8)
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/* Read / Write SPI device word length (1..N) */
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#define SPI_IOC_RD_BITS_PER_WORD        _IOR(SPI_IOC_MAGIC, 3, __u8)
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#define SPI_IOC_WR_BITS_PER_WORD        _IOW(SPI_IOC_MAGIC, 3, __u8)
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/* Read / Write SPI device default max speed hz */
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#define SPI_IOC_RD_MAX_SPEED_HZ         _IOR(SPI_IOC_MAGIC, 4, __u32)
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#define SPI_IOC_WR_MAX_SPEED_HZ         _IOW(SPI_IOC_MAGIC, 4, __u32)
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#endif /* SPIDEV_H */

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