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[/] [hive/] [trunk/] [v04.05/] [boot_code/] [boot_code_log2.h] - Blame information for rev 8

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1 4 ericw
/*
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--------------------------------------------------------------------------------
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Module : boot_code.h
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--------------------------------------------------------------------------------
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Function:
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- Boot code for a processor core.
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Instantiates:
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- Nothing.
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Notes:
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- For testing (@ core.v):
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  CLR_BASE              = 'h0;
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  CLR_SPAN              = 2;  // gives 4 instructions
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  INTR_BASE             = 'h20;  // 'd32
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  INTR_SPAN             = 2;  // gives 4 instructions
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--------------------------------------------------------------------------------
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*/
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        /*
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        --------------------
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        -- external stuff --
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        --------------------
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        */
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        `include "op_encode.h"
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        `include "reg_set_addr.h"
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        `include "boot_code_defs.h"
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        /*
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        ----------------------------------------
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        -- initialize: fill with default data --
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        ----------------------------------------
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        */
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        integer i;
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        initial begin
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/*      // fill with nop (some compilers need this)
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        for ( i = 0; i < CAPACITY; i = i+1 ) begin
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                ram[i] = { `nop, `s0, `s0 };
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        end
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*/
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        /*
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        ---------------
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        -- boot code --
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        ---------------
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        */
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        /*
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        ------------
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        -- TEST 0 --
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        ------------
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        */
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        // Log base 2
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        // Thread 0 : Get input 32 bit GPIO, calculate log2, output 32 bit GPIO.
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        // Other threads : do nothing, loop forever
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        ///////////////
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        // clr space //
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        ///////////////
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        i='h0;   ram[i] = { `lit_u,            `__, `s1 };  // s1=addr
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        i=i+1;   ram[i] =                      16'h0040  ;  // 
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        i=i+1;   ram[i] = { `gto,              `P1, `__ };  // goto, pop s1 (addr)
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        //
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        i='h04;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h08;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h0c;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h10;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h14;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h18;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h1c;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        ////////////////
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        // intr space //
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        ////////////////
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        ///////////////////////
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        // code & data space //
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        ///////////////////////
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        // read & write 32 bit GPIO data to & from s0
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        i='h40;  ram[i] = { `lit_u,            `__, `s3 };  // s3=addr
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        i=i+1;   ram[i] =                      16'h0080  ;  // 
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        i=i+1;   ram[i] = { `gsb,              `P3, `s3 };  // gsb, pop s3 (addr)
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        // do s0=log2(s0)
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        i=i+1;   ram[i] = { `lit_u,            `__, `s3 };  // s3=addr
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        i=i+1;   ram[i] =                      16'h0090  ;  //
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        i=i+1;   ram[i] = { `gsb,              `P3, `s7 };  // gsb, pop s3 (addr)
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        // write s0 data to 32 bit GPIO
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        i=i+1;   ram[i] = { `lit_u,            `__, `s3 };  // s3=addr
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        i=i+1;   ram[i] =                      16'h0070  ;  // 
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        i=i+1;   ram[i] = { `gsb,              `P3, `s3 };  // gsb, pop s3 (addr)
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        // loop forever
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        i=i+1;   ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        // sub : read 32 bit GPIO => s0, return to (s3)
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        i='h60;  ram[i] = { `dat_is,        `IO_LO, `s1 };  // s1=reg addr
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        i=i+1;   ram[i] = { `reg_rs,           `P1, `s0 };  // s0=(s1), pop s1
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        i=i+1;   ram[i] = { `dat_is,        `IO_HI, `s1 };  // s1=reg addr
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        i=i+1;   ram[i] = { `reg_rh,           `P1, `P0 };  // s0=(s1), pop both
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        i=i+1;   ram[i] = { `gto,              `P3, `__ };  // return, pop s3
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        // sub : write s0 => 32 bit GPIO, return to (s3)
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        i='h70;  ram[i] = { `dat_is,        `IO_LO, `s1 };  // s1=reg addr
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        i=i+1;   ram[i] = { `reg_w,            `P1, `s0 };  // (s1)=s0, pop s1
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        i=i+1;   ram[i] = { `dat_is,        `IO_HI, `s1 };  // s1=reg addr
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        i=i+1;   ram[i] = { `reg_wh,           `P1, `s0 };  // (s1)=s0, pop s1
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        i=i+1;   ram[i] = { `gto,              `P3, `__ };  // return, pop s3
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        // sub : read & write 32 bit GPIO => s0, return to (s3)
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        i='h80;  ram[i] = { `dat_is,        `IO_LO, `s1 };  // s1=reg addr
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        i=i+1;   ram[i] = { `reg_rs,           `s1, `s0 };  // s0=(s1)
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        i=i+1;   ram[i] = { `reg_w,            `P1, `s0 };  // (s1)=s0, pop s1
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        i=i+1;   ram[i] = { `dat_is,        `IO_HI, `s1 };  // s1=reg addr
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        i=i+1;   ram[i] = { `reg_rh,           `s1, `P0 };  // s0=(s1), pop s0
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        i=i+1;   ram[i] = { `reg_wh,           `P1, `s0 };  // (s1)=s0, pop s1
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        i=i+1;   ram[i] = { `gto,              `P3, `__ };  // return, pop s3
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        // sub : s0=log2(s0), return to (s7)
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        //
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        // input is in[31:0] an unsigned 32 bit integer
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        // output is c[31:27].m[26:0] unsigned fixed decimal
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        //
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        // s0 : input, normalize, square, output
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        // s1 : lzc, result
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        // s2 : 
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        // s3 : 
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        // s4 : 
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        // s5 : 
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        // s6 : loop index
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        // s7 : sub return address
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        //
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        // (input=0)? is an error, return
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        i='h90;  ram[i] = { `jmp_inz,         6'd1, `s0 };  // (s0!=0) ? skip return
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        i=i+1;   ram[i] = { `gto,              `P7, `__ };  // return to (s7), pop s7
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        // normalize
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        i=i+1;   ram[i] = { `lzc,              `s0, `s1 };  // s1=lzc(s0)
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        i=i+1;   ram[i] = { `shl_s,            `s1, `P0 };  // s0<<=s1 (normalize)
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        // loop setup
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        i=i+1;   ram[i] = { `dat_is,         6'd26, `s6 };  // s6=26 (loop index)
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        // loop start
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        i=i+1;   ram[i] = { `mul_xu,           `s0, `P0 };  // s0*=s0
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        i=i+1;   ram[i] = { `shl_is,          6'd1, `P1 };  // s1<<=1
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        // jump start
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        i=i+1;   ram[i] = { `jmp_ilz,         6'd2, `s0 };  // (s0[31]==1) ? jump
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        i=i+1;   ram[i] = { `shl_is,          6'd1, `P0 };  // s0<<=1
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P1 };  // s1++
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        // jump end
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P6 };  // s6--
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        i=i+1;   ram[i] = { `jmp_inlz,       -6'd7, `s6 };  // (s6>=0) ? do again
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        // loop end
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        // cleanup, return
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        i=i+1;   ram[i] = { `not,              `P1, `P0 };  // s0=~s1, pop both
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        i=i+1;   ram[i] = { `gto,              `P7, `P6 };  // return, pop s7 & s6
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        // end sub
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        end

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