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[/] [hpdmc/] [trunk/] [hpdmc_ddr32/] [rtl/] [hpdmc_banktimer.v] - Blame information for rev 21

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1 21 lekernel
/*
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 * Milkymist VJ SoC
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 * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
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 *
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 * This program is free software: you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation, version 3 of the License.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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 */
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module hpdmc_banktimer(
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        input sys_clk,
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        input sdram_rst,
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        input tim_cas,
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        input [1:0] tim_wr,
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        input read,
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        input write,
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        output reg precharge_safe
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);
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reg [2:0] counter;
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always @(posedge sys_clk) begin
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        if(sdram_rst) begin
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                counter <= 3'd0;
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                precharge_safe <= 1'b1;
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        end else begin
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                if(read) begin
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                        /* see p.26 of datasheet :
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                         * "A Read burst may be followed by, or truncated with, a Precharge command
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                         * to the same bank. The Precharge command should be issued x cycles after
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                         * the Read command, where x equals the number of desired data element
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                         * pairs"
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                         */
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                        counter <= 3'd4;
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                        precharge_safe <= 1'b0;
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                end else if(write) begin
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                        counter <= {1'b1, tim_wr};
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                        precharge_safe <= 1'b0;
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                end else begin
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                        if(counter == 3'b1)
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                                precharge_safe <= 1'b1;
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                        if(~precharge_safe)
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                                counter <= counter - 3'b1;
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                end
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        end
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end
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endmodule

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