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[/] [hpdmc/] [trunk/] [hpdmc_ddr32/] [rtl/] [spartan6/] [hpdmc_oddr32.v] - Blame information for rev 21

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1 21 lekernel 
/*
2 
 * Milkymist VJ SoC
3 
 * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
4 
 *
5 
 * This program is free software: you can redistribute it and/or modify
6 
 * it under the terms of the GNU General Public License as published by
7 
 * the Free Software Foundation, version 3 of the License.
8 
 *
9 
 * This program is distributed in the hope that it will be useful,
10 
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 
 * GNU General Public License for more details.
13 
 *
14 
 * You should have received a copy of the GNU General Public License
15 
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16 
 */
17 
 
18 
/*
19 
 * Verilog code that really should be replaced with a generate
20 
 * statement, but it does not work with some free simulators.
21 
 * So I put it in a module so as not to make other code unreadable,
22 
 * and keep compatibility with as many simulators as possible.
23 
 */
24 
 
25 
module hpdmc_oddr32 #(
26 
        parameter DDR_ALIGNMENT = "C0",
27 
        parameter INIT = 1'b0,
28 
        parameter SRTYPE = "ASYNC"
29 
) (
30 
        output [31:0] Q,
31 
        input C0,
32 
        input C1,
33 
        input CE,
34 
        input [31:0] D0,
35 
        input [31:0] D1,
36 
        input R,
37 
        input S
38 
);
39 
 
40 
ODDR2 #(
41 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
42 
        .INIT(INIT),
43 
        .SRTYPE(SRTYPE)
44 
) oddr0 (
45 
        .Q(Q[0]),
46 
        .C0(C0),
47 
        .C1(C1),
48 
        .CE(CE),
49 
        .D0(D0[0]),
50 
        .D1(D1[0]),
51 
        .R(R),
52 
        .S(S)
53 
);
54 
ODDR2 #(
55 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
56 
        .INIT(INIT),
57 
        .SRTYPE(SRTYPE)
58 
) oddr1 (
59 
        .Q(Q[1]),
60 
        .C0(C0),
61 
        .C1(C1),
62 
        .CE(CE),
63 
        .D0(D0[1]),
64 
        .D1(D1[1]),
65 
        .R(R),
66 
        .S(S)
67 
);
68 
ODDR2 #(
69 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
70 
        .INIT(INIT),
71 
        .SRTYPE(SRTYPE)
72 
) oddr2 (
73 
        .Q(Q[2]),
74 
        .C0(C0),
75 
        .C1(C1),
76 
        .CE(CE),
77 
        .D0(D0[2]),
78 
        .D1(D1[2]),
79 
        .R(R),
80 
        .S(S)
81 
);
82 
ODDR2 #(
83 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
84 
        .INIT(INIT),
85 
        .SRTYPE(SRTYPE)
86 
) oddr3 (
87 
        .Q(Q[3]),
88 
        .C0(C0),
89 
        .C1(C1),
90 
        .CE(CE),
91 
        .D0(D0[3]),
92 
        .D1(D1[3]),
93 
        .R(R),
94 
        .S(S)
95 
);
96 
ODDR2 #(
97 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
98 
        .INIT(INIT),
99 
        .SRTYPE(SRTYPE)
100 
) oddr4 (
101 
        .Q(Q[4]),
102 
        .C0(C0),
103 
        .C1(C1),
104 
        .CE(CE),
105 
        .D0(D0[4]),
106 
        .D1(D1[4]),
107 
        .R(R),
108 
        .S(S)
109 
);
110 
ODDR2 #(
111 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
112 
        .INIT(INIT),
113 
        .SRTYPE(SRTYPE)
114 
) oddr5 (
115 
        .Q(Q[5]),
116 
        .C0(C0),
117 
        .C1(C1),
118 
        .CE(CE),
119 
        .D0(D0[5]),
120 
        .D1(D1[5]),
121 
        .R(R),
122 
        .S(S)
123 
);
124 
ODDR2 #(
125 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
126 
        .INIT(INIT),
127 
        .SRTYPE(SRTYPE)
128 
) oddr6 (
129 
        .Q(Q[6]),
130 
        .C0(C0),
131 
        .C1(C1),
132 
        .CE(CE),
133 
        .D0(D0[6]),
134 
        .D1(D1[6]),
135 
        .R(R),
136 
        .S(S)
137 
);
138 
ODDR2 #(
139 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
140 
        .INIT(INIT),
141 
        .SRTYPE(SRTYPE)
142 
) oddr7 (
143 
        .Q(Q[7]),
144 
        .C0(C0),
145 
        .C1(C1),
146 
        .CE(CE),
147 
        .D0(D0[7]),
148 
        .D1(D1[7]),
149 
        .R(R),
150 
        .S(S)
151 
);
152 
ODDR2 #(
153 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
154 
        .INIT(INIT),
155 
        .SRTYPE(SRTYPE)
156 
) oddr8 (
157 
        .Q(Q[8]),
158 
        .C0(C0),
159 
        .C1(C1),
160 
        .CE(CE),
161 
        .D0(D0[8]),
162 
        .D1(D1[8]),
163 
        .R(R),
164 
        .S(S)
165 
);
166 
ODDR2 #(
167 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
168 
        .INIT(INIT),
169 
        .SRTYPE(SRTYPE)
170 
) oddr9 (
171 
        .Q(Q[9]),
172 
        .C0(C0),
173 
        .C1(C1),
174 
        .CE(CE),
175 
        .D0(D0[9]),
176 
        .D1(D1[9]),
177 
        .R(R),
178 
        .S(S)
179 
);
180 
ODDR2 #(
181 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
182 
        .INIT(INIT),
183 
        .SRTYPE(SRTYPE)
184 
) oddr10 (
185 
        .Q(Q[10]),
186 
        .C0(C0),
187 
        .C1(C1),
188 
        .CE(CE),
189 
        .D0(D0[10]),
190 
        .D1(D1[10]),
191 
        .R(R),
192 
        .S(S)
193 
);
194 
ODDR2 #(
195 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
196 
        .INIT(INIT),
197 
        .SRTYPE(SRTYPE)
198 
) oddr11 (
199 
        .Q(Q[11]),
200 
        .C0(C0),
201 
        .C1(C1),
202 
        .CE(CE),
203 
        .D0(D0[11]),
204 
        .D1(D1[11]),
205 
        .R(R),
206 
        .S(S)
207 
);
208 
ODDR2 #(
209 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
210 
        .INIT(INIT),
211 
        .SRTYPE(SRTYPE)
212 
) oddr12 (
213 
        .Q(Q[12]),
214 
        .C0(C0),
215 
        .C1(C1),
216 
        .CE(CE),
217 
        .D0(D0[12]),
218 
        .D1(D1[12]),
219 
        .R(R),
220 
        .S(S)
221 
);
222 
ODDR2 #(
223 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
224 
        .INIT(INIT),
225 
        .SRTYPE(SRTYPE)
226 
) oddr13 (
227 
        .Q(Q[13]),
228 
        .C0(C0),
229 
        .C1(C1),
230 
        .CE(CE),
231 
        .D0(D0[13]),
232 
        .D1(D1[13]),
233 
        .R(R),
234 
        .S(S)
235 
);
236 
ODDR2 #(
237 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
238 
        .INIT(INIT),
239 
        .SRTYPE(SRTYPE)
240 
) oddr14 (
241 
        .Q(Q[14]),
242 
        .C0(C0),
243 
        .C1(C1),
244 
        .CE(CE),
245 
        .D0(D0[14]),
246 
        .D1(D1[14]),
247 
        .R(R),
248 
        .S(S)
249 
);
250 
ODDR2 #(
251 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
252 
        .INIT(INIT),
253 
        .SRTYPE(SRTYPE)
254 
) oddr15 (
255 
        .Q(Q[15]),
256 
        .C0(C0),
257 
        .C1(C1),
258 
        .CE(CE),
259 
        .D0(D0[15]),
260 
        .D1(D1[15]),
261 
        .R(R),
262 
        .S(S)
263 
);
264 
ODDR2 #(
265 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
266 
        .INIT(INIT),
267 
        .SRTYPE(SRTYPE)
268 
) oddr16 (
269 
        .Q(Q[16]),
270 
        .C0(C0),
271 
        .C1(C1),
272 
        .CE(CE),
273 
        .D0(D0[16]),
274 
        .D1(D1[16]),
275 
        .R(R),
276 
        .S(S)
277 
);
278 
ODDR2 #(
279 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
280 
        .INIT(INIT),
281 
        .SRTYPE(SRTYPE)
282 
) oddr17 (
283 
        .Q(Q[17]),
284 
        .C0(C0),
285 
        .C1(C1),
286 
        .CE(CE),
287 
        .D0(D0[17]),
288 
        .D1(D1[17]),
289 
        .R(R),
290 
        .S(S)
291 
);
292 
ODDR2 #(
293 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
294 
        .INIT(INIT),
295 
        .SRTYPE(SRTYPE)
296 
) oddr18 (
297 
        .Q(Q[18]),
298 
        .C0(C0),
299 
        .C1(C1),
300 
        .CE(CE),
301 
        .D0(D0[18]),
302 
        .D1(D1[18]),
303 
        .R(R),
304 
        .S(S)
305 
);
306 
ODDR2 #(
307 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
308 
        .INIT(INIT),
309 
        .SRTYPE(SRTYPE)
310 
) oddr19 (
311 
        .Q(Q[19]),
312 
        .C0(C0),
313 
        .C1(C1),
314 
        .CE(CE),
315 
        .D0(D0[19]),
316 
        .D1(D1[19]),
317 
        .R(R),
318 
        .S(S)
319 
);
320 
ODDR2 #(
321 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
322 
        .INIT(INIT),
323 
        .SRTYPE(SRTYPE)
324 
) oddr20 (
325 
        .Q(Q[20]),
326 
        .C0(C0),
327 
        .C1(C1),
328 
        .CE(CE),
329 
        .D0(D0[20]),
330 
        .D1(D1[20]),
331 
        .R(R),
332 
        .S(S)
333 
);
334 
ODDR2 #(
335 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
336 
        .INIT(INIT),
337 
        .SRTYPE(SRTYPE)
338 
) oddr21 (
339 
        .Q(Q[21]),
340 
        .C0(C0),
341 
        .C1(C1),
342 
        .CE(CE),
343 
        .D0(D0[21]),
344 
        .D1(D1[21]),
345 
        .R(R),
346 
        .S(S)
347 
);
348 
ODDR2 #(
349 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
350 
        .INIT(INIT),
351 
        .SRTYPE(SRTYPE)
352 
) oddr22 (
353 
        .Q(Q[22]),
354 
        .C0(C0),
355 
        .C1(C1),
356 
        .CE(CE),
357 
        .D0(D0[22]),
358 
        .D1(D1[22]),
359 
        .R(R),
360 
        .S(S)
361 
);
362 
ODDR2 #(
363 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
364 
        .INIT(INIT),
365 
        .SRTYPE(SRTYPE)
366 
) oddr23 (
367 
        .Q(Q[23]),
368 
        .C0(C0),
369 
        .C1(C1),
370 
        .CE(CE),
371 
        .D0(D0[23]),
372 
        .D1(D1[23]),
373 
        .R(R),
374 
        .S(S)
375 
);
376 
ODDR2 #(
377 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
378 
        .INIT(INIT),
379 
        .SRTYPE(SRTYPE)
380 
) oddr24 (
381 
        .Q(Q[24]),
382 
        .C0(C0),
383 
        .C1(C1),
384 
        .CE(CE),
385 
        .D0(D0[24]),
386 
        .D1(D1[24]),
387 
        .R(R),
388 
        .S(S)
389 
);
390 
ODDR2 #(
391 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
392 
        .INIT(INIT),
393 
        .SRTYPE(SRTYPE)
394 
) oddr25 (
395 
        .Q(Q[25]),
396 
        .C0(C0),
397 
        .C1(C1),
398 
        .CE(CE),
399 
        .D0(D0[25]),
400 
        .D1(D1[25]),
401 
        .R(R),
402 
        .S(S)
403 
);
404 
ODDR2 #(
405 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
406 
        .INIT(INIT),
407 
        .SRTYPE(SRTYPE)
408 
) oddr26 (
409 
        .Q(Q[26]),
410 
        .C0(C0),
411 
        .C1(C1),
412 
        .CE(CE),
413 
        .D0(D0[26]),
414 
        .D1(D1[26]),
415 
        .R(R),
416 
        .S(S)
417 
);
418 
ODDR2 #(
419 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
420 
        .INIT(INIT),
421 
        .SRTYPE(SRTYPE)
422 
) oddr27 (
423 
        .Q(Q[27]),
424 
        .C0(C0),
425 
        .C1(C1),
426 
        .CE(CE),
427 
        .D0(D0[27]),
428 
        .D1(D1[27]),
429 
        .R(R),
430 
        .S(S)
431 
);
432 
ODDR2 #(
433 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
434 
        .INIT(INIT),
435 
        .SRTYPE(SRTYPE)
436 
) oddr28 (
437 
        .Q(Q[28]),
438 
        .C0(C0),
439 
        .C1(C1),
440 
        .CE(CE),
441 
        .D0(D0[28]),
442 
        .D1(D1[28]),
443 
        .R(R),
444 
        .S(S)
445 
);
446 
ODDR2 #(
447 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
448 
        .INIT(INIT),
449 
        .SRTYPE(SRTYPE)
450 
) oddr29 (
451 
        .Q(Q[29]),
452 
        .C0(C0),
453 
        .C1(C1),
454 
        .CE(CE),
455 
        .D0(D0[29]),
456 
        .D1(D1[29]),
457 
        .R(R),
458 
        .S(S)
459 
);
460 
ODDR2 #(
461 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
462 
        .INIT(INIT),
463 
        .SRTYPE(SRTYPE)
464 
) oddr30 (
465 
        .Q(Q[30]),
466 
        .C0(C0),
467 
        .C1(C1),
468 
        .CE(CE),
469 
        .D0(D0[30]),
470 
        .D1(D1[30]),
471 
        .R(R),
472 
        .S(S)
473 
);
474 
ODDR2 #(
475 
        .DDR_ALIGNMENT(DDR_ALIGNMENT),
476 
        .INIT(INIT),
477 
        .SRTYPE(SRTYPE)
478 
) oddr31 (
479 
        .Q(Q[31]),
480 
        .C0(C0),
481 
        .C1(C1),
482 
        .CE(CE),
483 
        .D0(D0[31]),
484 
        .D1(D1[31]),
485 
        .R(R),
486 
        .S(S)
487 
);
488 
 
489 
endmodule

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