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[/] [hssdrc/] [trunk/] [testbench/] [hssdrc_driver_class.sv] - Blame information for rev 4

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//
// Project      : High-Speed SDRAM Controller with adaptive bank management and command pipeline
//
// Project Nick : HSSDRC
//
// Version      : 1.0-beta
//
// Revision     : $Revision: 1.1 $
//
// Date         : $Date: 2008-03-06 13:54:00 $
//
// Workfile     : hssdrc_driver_class.sv
//
// Description  : low level API driver for hssdrc_controller
//
// HSSDRC is licensed under MIT License
//
// Copyright (c) 2007-2008, Denis V.Shekhalev (des00@opencores.org)
//
// Permission  is hereby granted, free of charge, to any person obtaining a copy of
// this  software  and  associated documentation files (the "Software"), to deal in
// the  Software  without  restriction,  including without limitation the rights to
// use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
// the  Software, and to permit persons to whom the Software is furnished to do so,
// subject to the following conditions:
//
// The  above  copyright notice and this permission notice shall be included in all
// copies or substantial portions of the Software.
//
// THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
// FOR  A  PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
// COPYRIGHT  HOLDERS  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
// IN  AN  ACTION  OF  CONTRACT,  TORT  OR  OTHERWISE,  ARISING  FROM, OUT OF OR IN
// CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//
 
 
 
`include "hssdrc_tb_sys_if.vh"
 
`include "hssdrc_define.vh"
 
`include "tb_define.svh"
 
`include "hssrdc_driver_cbs_class.sv"
 
`ifndef __HSSDRC_DRIVER_SV__
 
  `define __HSSDRC_DRIVER_SV__
 
  class hssrdc_driver_class;
 
    // callback quene
    hssrdc_driver_cbs_class cbs[$];
 
    // mailboxes to connect with transaction agent
    sdram_tr_mbx in_mbx;
 
    // mailbox for connect command path with data path of this driver
    sdram_tr_mbx wdata_mbx;
    sdram_tr_mbx rdata_mbx;
 
    //
    virtual hssdrc_tb_sys_if sys_if;
 
    // acknowledge mailbox for agent. used in locked transaction only
    sdram_tr_ack_mbx done_mbx;
 
    // feedback to tb for waiting event
    event write_done;
    event read_done;
 
    // driver work modes
    bit random_delay_mode = 0;
    bit debug             = 0;
 
    //
    //
    //
 
    function new (virtual hssdrc_tb_sys_if sys_if,  sdram_tr_mbx in_mbx, sdram_tr_ack_mbx done_mbx);
 
      this.sys_if   = sys_if;
 
      this.in_mbx   = in_mbx;
 
      this.done_mbx = done_mbx;
 
      // internal not sized mailboxes : all must be controlled via in_mbx, out_mbx size
      wdata_mbx = new;
      rdata_mbx = new;
 
    endfunction
 
    //
    // init interface task
    //
 
    task init;
      sys_if.cb.write   <= 1'b0;
      sys_if.cb.read    <= 1'b0;
      sys_if.cb.refr    <= 1'b0;
      sys_if.cb.cola    <= '0;
      sys_if.cb.rowa    <= '0;
      sys_if.cb.ba      <= '0;
      sys_if.cb.chid_i  <= '0;
      sys_if.cb.burst   <= '0;
      sys_if.cb.wdata   <= '0;
      sys_if.cb.wdatam  <= '0;
    endtask
 
    //
    // start driver task
    //
 
    task run;
      init ();
      fork
        CommandDriver   ();
        WriteDataDriver ();
        ReadDataDriver  ();
      join_none;
    endtask
 
    //
    // stop driver task
    //
 
    task stop ();
      disable this.CommandDriver;
      disable this.WriteDataDriver;
      disable this.ReadDataDriver;
    endtask
 
    //-----------------------------------------------------------------------
    // command driver
    //-----------------------------------------------------------------------
 
    task CommandDriver;
      sdram_transaction_class tr;
 
      bit [4:0] delay;  // max delay is 32 bit
 
    begin
 
      @(sys_if.cb);
      forever begin
 
        // syncronize mailbox to clock
        if ( !in_mbx.try_get(tr) ) begin
          @(sys_if.cb);
          continue;
        end
 
        if (debug) begin
          if ((tr.tr_type == cTR_READ) || (tr.tr_type == cTR_READ_LOCKED))
            $display("%0t cmd get READ transaction id = %0d", $time, tr.id);
          else if ((tr.tr_type == cTR_WRITE) || (tr.tr_type == cTR_WRITE_LOCKED))
            $display("%0t cmd get WRITE transaction id = %0d", $time, tr.id);
        end
 
        if (random_delay_mode) begin
          assert (std::randomize(delay) with {delay dist {0 := 1, !0 :/ 2};}) else
            $error ("random delay generate error");
 
          repeat (delay) @(sys_if.cb);
        end
 
 
        // set command on interface
        SetCommand(tr);
 
        // if need callbacks
        foreach ( cbs [i] ) cbs[i].post_Command ($realtime);
 
        // set command for write/read drivers
        case (tr.tr_type)
          cTR_WRITE, cTR_WRITE_LOCKED : wdata_mbx.put (tr);
          cTR_READ , cTR_READ_LOCKED  : rdata_mbx.put (tr);
        endcase
 
        // for locked transactions wait done and set acknowledge
        case (tr.tr_type)
          cTR_WRITE_LOCKED : begin
            @(write_done);
            done_mbx.put (cTR_WRITE_LOCKED);
          end
          cTR_READ_LOCKED  : begin
            @(read_done);
            done_mbx.put(cTR_READ_LOCKED);
          end
          cTR_REFR_LOCKED : begin
            done_mbx.put (cTR_WRITE_LOCKED);
          end
        endcase
 
      end
    end
    endtask
 
    //
    //
    //
 
    task SetCommand (sdram_transaction_class tr);
 
      case (tr.tr_type)
        cTR_WRITE, cTR_WRITE_LOCKED : begin
          sys_if.cb.write <= 1'b1;
          sys_if.cb.read  <= 1'b0;
          sys_if.cb.refr  <= 1'b0;
        end
        cTR_READ,  cTR_READ_LOCKED  : begin
          sys_if.cb.write <= 1'b0;
          sys_if.cb.read  <= 1'b1;
          sys_if.cb.refr  <= 1'b0;
        end
        cTR_REFR,  cTR_REFR_LOCKED  : begin
          sys_if.cb.write <= 1'b0;
          sys_if.cb.read  <= 1'b0;
          sys_if.cb.refr  <= 1'b1;
        end
      endcase
 
      sys_if.cb.rowa    <= tr.rowa;
      sys_if.cb.cola    <= tr.cola;
      sys_if.cb.ba      <= tr.ba;
      sys_if.cb.burst   <= tr.burst;
      sys_if.cb.chid_i  <= tr.chid;
 
      do
        @(sys_if.cb);
      while (sys_if.cb.ready != 1'b1);
 
      sys_if.cb.write <= 1'b0;
      sys_if.cb.read  <= 1'b0;
      sys_if.cb.refr  <= 1'b0;
 
    endtask
 
    //-----------------------------------------------------------------------
    // write data  driver
    //-----------------------------------------------------------------------
 
    task WriteDataDriver;
 
      sdram_transaction_class tr;
      int num;
 
    begin
 
      forever begin
        wdata_mbx.get (tr);
 
        if (debug)
          $display("%0t write driver get transaction id = %0d", $time, tr.id);
 
        num = tr.burst + 1;
 
        // set data
        for (int i = 0; i < num; i++)
          SetWrData (tr.wdata [i] , tr.wdatam [i]);
 
        -> write_done;
 
        if (debug)
          $display("%0t write driver done transaction id = %0d", $time, tr.id);
 
        foreach ( cbs[i] ) cbs[i].post_WriteData($realtime, tr);
 
      end
    end
    endtask
 
    //
    //
    //
`ifndef HSSDRC_COMBINATIVE_USE_WDATA
    task SetWrData ( input data_t data, datam_t datam);
      sys_if.cb.wdata   <= data;
      sys_if.cb.wdatam  <= datam;
 
      do
        @(sys_if.cb);
      while (sys_if.cb.use_wdata != 1'b1);
    endtask
`else
    task SetWrData ( input data_t data, datam_t datam);
      do
        @(sys_if.cb);
      while (sys_if.cb.use_wdata != 1'b1);
 
      sys_if.cb.wdata   <= data;
      sys_if.cb.wdatam  <= datam;
    endtask
`endif
    //-----------------------------------------------------------------------
    // read part of  driver
    //-----------------------------------------------------------------------
 
    task ReadDataDriver;
 
      sdram_transaction_class tr;
      int num;
 
    begin
      forever begin
        rdata_mbx.get (tr);
 
        if (debug)
          $display("%0t read driver get transaction id = %0d", $time, tr.id);
 
        num = tr.burst + 1;
 
        for (int i = 0; i < num; i++)
            GetRdData (tr.rdata [i], tr.rchid [i]);
 
        -> read_done;
 
        if (debug)
          $display("%0t read driver done transaction id = %0d", $time, tr.id);
 
        foreach ( cbs[i] ) cbs[i].post_ReadData($realtime, tr);
 
      end
    end
    endtask
 
    //
    //
    //
 
    task GetRdData (output data_t data, chid_t chid);
 
      do
        @(sys_if.cb);
      while (sys_if.cb.vld_rdata != 1'b1);
 
      data = sys_if.cb.rdata;
      chid = sys_if.cb.chid_o;
 
    endtask
 
    //
    //
    //
 
  endclass
 
`endif

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[/] [hssdrc/] [trunk/] [testbench/] [hssdrc_driver_class.sv] - Blame information for rev 4

Line No.	Rev	Author	Line
1	2	des00	`//`
2			`// Project : High-Speed SDRAM Controller with adaptive bank management and command pipeline`
3			`//`
4			`// Project Nick : HSSDRC`
5			`//`
6			`// Version : 1.0-beta`
7			`//`
8			`// Revision : $Revision: 1.1 $`
9			`//`
10			`// Date : $Date: 2008-03-06 13:54:00 $`
11			`//`
12			`// Workfile : hssdrc_driver_class.sv`
13			`//`
14			`// Description : low level API driver for hssdrc_controller`
15			`//`
16			`// HSSDRC is licensed under MIT License`
17			`//`
18			`// Copyright (c) 2007-2008, Denis V.Shekhalev (des00@opencores.org)`
19			`//`
20			`// Permission is hereby granted, free of charge, to any person obtaining a copy of`
21			`// this software and associated documentation files (the "Software"), to deal in`
22			`// the Software without restriction, including without limitation the rights to`
23			`// use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of`
24			`// the Software, and to permit persons to whom the Software is furnished to do so,`
25			`// subject to the following conditions:`
26			`//`
27			`// The above copyright notice and this permission notice shall be included in all`
28			`// copies or substantial portions of the Software.`
29			`//`
30			`// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR`
31			`// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS`
32			`// FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR`
33			`// COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER`
34			`// IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN`
35			`// CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.`
36			`//`
37
38
39
40			`include "hssdrc_tb_sys_if.vh"
41
42			`include "hssdrc_define.vh"
43
44			`include "tb_define.svh"
45
46			`include "hssrdc_driver_cbs_class.sv"
47
48			`ifndef __HSSDRC_DRIVER_SV__
49
50			`define __HSSDRC_DRIVER_SV__
51
52			`class hssrdc_driver_class;`
53
54			`// callback quene`
55			`hssrdc_driver_cbs_class cbs[$];`
56
57			`// mailboxes to connect with transaction agent`
58			`sdram_tr_mbx in_mbx;`
59
60			`// mailbox for connect command path with data path of this driver`
61			`sdram_tr_mbx wdata_mbx;`
62			`sdram_tr_mbx rdata_mbx;`
63
64			`//`
65			`virtual hssdrc_tb_sys_if sys_if;`
66
67			`// acknowledge mailbox for agent. used in locked transaction only`
68			`sdram_tr_ack_mbx done_mbx;`
69
70			`// feedback to tb for waiting event`
71			`event write_done;`
72			`event read_done;`
73
74			`// driver work modes`
75			`bit random_delay_mode = 0;`
76			`bit debug = 0;`
77
78			`//`
79			`//`
80			`//`
81
82			`function new (virtual hssdrc_tb_sys_if sys_if, sdram_tr_mbx in_mbx, sdram_tr_ack_mbx done_mbx);`
83
84			`this.sys_if = sys_if;`
85
86			`this.in_mbx = in_mbx;`
87
88			`this.done_mbx = done_mbx;`
89
90			`// internal not sized mailboxes : all must be controlled via in_mbx, out_mbx size`
91			`wdata_mbx = new;`
92			`rdata_mbx = new;`
93
94			`endfunction`
95
96			`//`
97			`// init interface task`
98			`//`
99
100			`task init;`
101			`sys_if.cb.write <= 1'b0;`
102			`sys_if.cb.read <= 1'b0;`
103			`sys_if.cb.refr <= 1'b0;`
104			`sys_if.cb.cola <= '0;`
105			`sys_if.cb.rowa <= '0;`
106			`sys_if.cb.ba <= '0;`
107			`sys_if.cb.chid_i <= '0;`
108			`sys_if.cb.burst <= '0;`
109			`sys_if.cb.wdata <= '0;`
110			`sys_if.cb.wdatam <= '0;`
111			`endtask`
112
113			`//`
114			`// start driver task`
115			`//`
116
117			`task run;`
118			`init ();`
119			`fork`
120			`CommandDriver ();`
121			`WriteDataDriver ();`
122			`ReadDataDriver ();`
123			`join_none;`
124			`endtask`
125
126			`//`
127			`// stop driver task`
128			`//`
129
130			`task stop ();`
131			`disable this.CommandDriver;`
132			`disable this.WriteDataDriver;`
133			`disable this.ReadDataDriver;`
134			`endtask`
135
136			`//-----------------------------------------------------------------------`
137			`// command driver`
138			`//-----------------------------------------------------------------------`
139
140			`task CommandDriver;`
141			`sdram_transaction_class tr;`
142
143			`bit [4:0] delay; // max delay is 32 bit`
144
145			`begin`
146
147			`@(sys_if.cb);`
148			`forever begin`
149
150			`// syncronize mailbox to clock`
151			`if ( !in_mbx.try_get(tr) ) begin`
152			`@(sys_if.cb);`
153			`continue;`
154			`end`
155
156			`if (debug) begin`
157			`if ((tr.tr_type == cTR_READ) \|\| (tr.tr_type == cTR_READ_LOCKED))`
158			`$display("%0t cmd get READ transaction id = %0d", $time, tr.id);`
159			`else if ((tr.tr_type == cTR_WRITE) \|\| (tr.tr_type == cTR_WRITE_LOCKED))`
160			`$display("%0t cmd get WRITE transaction id = %0d", $time, tr.id);`
161			`end`
162
163			`if (random_delay_mode) begin`
164			`assert (std::randomize(delay) with {delay dist {0 := 1, !0 :/ 2};}) else`
165			`$error ("random delay generate error");`
166
167			`repeat (delay) @(sys_if.cb);`
168			`end`
169
170
171			`// set command on interface`
172			`SetCommand(tr);`
173
174			`// if need callbacks`
175			`foreach ( cbs [i] ) cbs[i].post_Command ($realtime);`
176
177			`// set command for write/read drivers`
178			`case (tr.tr_type)`
179			`cTR_WRITE, cTR_WRITE_LOCKED : wdata_mbx.put (tr);`
180			`cTR_READ , cTR_READ_LOCKED : rdata_mbx.put (tr);`
181			`endcase`
182
183			`// for locked transactions wait done and set acknowledge`
184			`case (tr.tr_type)`
185			`cTR_WRITE_LOCKED : begin`
186			`@(write_done);`
187			`done_mbx.put (cTR_WRITE_LOCKED);`
188			`end`
189			`cTR_READ_LOCKED : begin`
190			`@(read_done);`
191			`done_mbx.put(cTR_READ_LOCKED);`
192			`end`
193			`cTR_REFR_LOCKED : begin`
194			`done_mbx.put (cTR_WRITE_LOCKED);`
195			`end`
196			`endcase`
197
198			`end`
199			`end`
200			`endtask`
201
202			`//`
203			`//`
204			`//`
205
206			`task SetCommand (sdram_transaction_class tr);`
207
208			`case (tr.tr_type)`
209			`cTR_WRITE, cTR_WRITE_LOCKED : begin`
210			`sys_if.cb.write <= 1'b1;`
211			`sys_if.cb.read <= 1'b0;`
212			`sys_if.cb.refr <= 1'b0;`
213			`end`
214			`cTR_READ, cTR_READ_LOCKED : begin`
215			`sys_if.cb.write <= 1'b0;`
216			`sys_if.cb.read <= 1'b1;`
217			`sys_if.cb.refr <= 1'b0;`
218			`end`
219			`cTR_REFR, cTR_REFR_LOCKED : begin`
220			`sys_if.cb.write <= 1'b0;`
221			`sys_if.cb.read <= 1'b0;`
222			`sys_if.cb.refr <= 1'b1;`
223			`end`
224			`endcase`
225
226			`sys_if.cb.rowa <= tr.rowa;`
227			`sys_if.cb.cola <= tr.cola;`
228			`sys_if.cb.ba <= tr.ba;`
229			`sys_if.cb.burst <= tr.burst;`
230			`sys_if.cb.chid_i <= tr.chid;`
231
232			`do`
233			`@(sys_if.cb);`
234			`while (sys_if.cb.ready != 1'b1);`
235
236			`sys_if.cb.write <= 1'b0;`
237			`sys_if.cb.read <= 1'b0;`
238			`sys_if.cb.refr <= 1'b0;`
239
240			`endtask`
241
242			`//-----------------------------------------------------------------------`
243			`// write data driver`
244			`//-----------------------------------------------------------------------`
245
246			`task WriteDataDriver;`
247
248			`sdram_transaction_class tr;`
249			`int num;`
250
251			`begin`
252
253			`forever begin`
254			`wdata_mbx.get (tr);`
255
256			`if (debug)`
257			`$display("%0t write driver get transaction id = %0d", $time, tr.id);`
258
259			`num = tr.burst + 1;`
260
261			`// set data`
262			`for (int i = 0; i < num; i++)`
263			`SetWrData (tr.wdata [i] , tr.wdatam [i]);`
264
265			`-> write_done;`
266
267			`if (debug)`
268			`$display("%0t write driver done transaction id = %0d", $time, tr.id);`
269
270			`foreach ( cbs[i] ) cbs[i].post_WriteData($realtime, tr);`
271
272			`end`
273			`end`
274			`endtask`
275
276			`//`
277			`//`
278			`//`
279			`ifndef HSSDRC_COMBINATIVE_USE_WDATA
280			`task SetWrData ( input data_t data, datam_t datam);`
281			`sys_if.cb.wdata <= data;`
282			`sys_if.cb.wdatam <= datam;`
283
284			`do`
285			`@(sys_if.cb);`
286			`while (sys_if.cb.use_wdata != 1'b1);`
287			`endtask`
288			`else
289			`task SetWrData ( input data_t data, datam_t datam);`
290			`do`
291			`@(sys_if.cb);`
292			`while (sys_if.cb.use_wdata != 1'b1);`
293
294			`sys_if.cb.wdata <= data;`
295			`sys_if.cb.wdatam <= datam;`
296			`endtask`
297			`endif
298			`//-----------------------------------------------------------------------`
299			`// read part of driver`
300			`//-----------------------------------------------------------------------`
301
302			`task ReadDataDriver;`
303
304			`sdram_transaction_class tr;`
305			`int num;`
306
307			`begin`
308			`forever begin`
309			`rdata_mbx.get (tr);`
310
311			`if (debug)`
312			`$display("%0t read driver get transaction id = %0d", $time, tr.id);`
313
314			`num = tr.burst + 1;`
315
316			`for (int i = 0; i < num; i++)`
317			`GetRdData (tr.rdata [i], tr.rchid [i]);`
318
319			`-> read_done;`
320
321			`if (debug)`
322			`$display("%0t read driver done transaction id = %0d", $time, tr.id);`
323
324			`foreach ( cbs[i] ) cbs[i].post_ReadData($realtime, tr);`
325
326			`end`
327			`end`
328			`endtask`
329
330			`//`
331			`//`
332			`//`
333
334			`task GetRdData (output data_t data, chid_t chid);`
335
336			`do`
337			`@(sys_if.cb);`
338			`while (sys_if.cb.vld_rdata != 1'b1);`
339
340			`data = sys_if.cb.rdata;`
341			`chid = sys_if.cb.chid_o;`
342
343			`endtask`
344
345			`//`
346			`//`
347			`//`
348
349			`endclass`
350
351			`endif