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[/] [hssdrc/] [trunk/] [testbench/] [hssrdc_bandwidth_monitor_class.sv] - Blame information for rev 3

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//
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// Project      : High-Speed SDRAM Controller with adaptive bank management and command pipeline
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//
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// Project Nick : HSSDRC
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//
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// Version      : 1.0-beta
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//
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// Revision     : $Revision: 1.1 $
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//
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// Date         : $Date: 2008-03-06 13:54:00 $
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//
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// Workfile     : hssrdc_bandwidth_monitor_class.sv
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//
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// Description  : bandwidth monitor measurement class
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//
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// HSSDRC is licensed under MIT License
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//
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// Copyright (c) 2007-2008, Denis V.Shekhalev (des00@opencores.org)
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//
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// Permission  is hereby granted, free of charge, to any person obtaining a copy of
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// this  software  and  associated documentation files (the "Software"), to deal in
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// the  Software  without  restriction,  including without limitation the rights to
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// use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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// the  Software, and to permit persons to whom the Software is furnished to do so,
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// subject to the following conditions:
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//
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// The  above  copyright notice and this permission notice shall be included in all
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// copies or substantial portions of the Software.
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//
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// THE  SOFTWARE  IS  PROVIDED  "AS  IS",  WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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// FOR  A  PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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// COPYRIGHT  HOLDERS  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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// IN  AN  ACTION  OF  CONTRACT,  TORT  OR  OTHERWISE,  ARISING  FROM, OUT OF OR IN
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// CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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//
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`include "hssdrc_define.vh"
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`include "hssdrc_timing.vh"
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`include "hssdrc_tb_sys_if.vh"
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`include "sdram_transaction_class.sv"
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`include "hssrdc_driver_cbs_class.sv"
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`ifndef __HSSDRC_BANDWIDTH_MONITOR_CLASS__
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  `define __HSSDRC_BANDWIDTH_MONITOR_CLASS__
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  class hssdrc_bandwidth_monitor_class extends hssrdc_driver_cbs_class;
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    virtual hssdrc_tb_sys_if sys_if;
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    // bandwidth measurement FSM
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    enum {idle, wait_start, work} state = idle;
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    // timestamps
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    realtime end_time;
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    realtime start_time;
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    // word transfer counters
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    int unsigned wr_word_num;
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    int unsigned rd_word_num;
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    // bandwidth measurement itself
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    real write_bandwidth ;
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    real read_bandwidth  ;
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    real bandwidth       ;
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    real write_bandwidth_percent  ;
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    real read_bandwidth_percent   ;
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    real bandwidth_percent        ;
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    // semaphore to controll access to variables
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    semaphore sem;
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    // bandwidth measurement parameters
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    real mbps_mfactor;
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    real max_bandwidth;
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    //  tb syncronization
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    int measured_tr_num = 0;
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    event done;
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    function new (virtual hssdrc_tb_sys_if sys_if, ref event done);
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      sem = new (1);
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      this.sys_if = sys_if;
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      this.done   = done;
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    endfunction
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    //
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    // function to start measurement process
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    //
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    task start();
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      sem.get (1) ;
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      // set begin
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      state = wait_start;
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      // clear all counters
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      end_time    = 0ns;
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      start_time  = 0ns;
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      wr_word_num = 0;
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      rd_word_num = 0;
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      measured_tr_num = 0;
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      sem.put (1) ;
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    endtask
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    //
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    // function to stop measurement process
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    //
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    task stop();
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     sem.get (1);
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     state = idle;
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     count_bandwidth();
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     sem.put (1);
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    endtask
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    //
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    // callback for command part of hssdrc_driver_class
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    //
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    task post_Command (input realtime t);
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    endtask
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    //
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    // callback for write part of hssdrc_driver_class
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    //
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    task post_WriteData (input realtime t, sdram_transaction_class tr);
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      int burst;
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    begin
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      burst = tr.burst + 1;
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      sem.get (1);
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      if (state == wait_start) begin
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        start_time  = t;
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        state       = work;
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      end
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      else if (state == work) begin
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        wr_word_num += burst;
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        end_time    = t;
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      end
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      measured_tr_num++;
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      -> done;
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      sem.put (1);
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    end
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    endtask
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    //
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    // callback for read part of hssdrc_driver_class
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    //
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    task post_ReadData ( input realtime t, sdram_transaction_class tr);
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      int burst;
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    begin
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      burst = tr.burst + 1;
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      sem.get (1);
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      if (state == wait_start) begin
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        start_time  = t;
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        state       = work;
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      end
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      else if (state == work) begin
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        rd_word_num += burst;
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        end_time    = t;
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      end
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      measured_tr_num++;
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      -> done;
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      sem.put (1);
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    end
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    endtask
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    //
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    // measurement count function bwth = mbps_mfactor*num/(end_time - start_time);
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    //
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    function void count_bandwidth();
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      realtime delta;
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      int unsigned wrrd_word_num;
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    begin
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      delta = (end_time - start_time);
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      wrrd_word_num = wr_word_num + rd_word_num;
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      write_bandwidth =   (wr_word_num/delta)*mbps_mfactor;
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      read_bandwidth  =   (rd_word_num/delta)*mbps_mfactor;
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      bandwidth       = (wrrd_word_num/delta)*mbps_mfactor;
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      write_bandwidth_percent = write_bandwidth*100.0/max_bandwidth ;
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      read_bandwidth_percent  = read_bandwidth *100.0/max_bandwidth ;
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      bandwidth_percent       = bandwidth      *100.0/max_bandwidth ;
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    end
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    endfunction
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    //
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    // task to get multiplicatin factor for counters
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    //
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    task count_mbps_mfactor (int bytes_in_kilobytes) ;
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      realtime delta;
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      realtime scale;
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    begin
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      // define current timeunit value
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      delta = $realtime;
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      #1;
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      delta = $realtime - delta;
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      // define time scale factor
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      scale = 1s/delta;
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      // kilobytes
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      mbps_mfactor = real'(scale)/(bytes_in_kilobytes);
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      // megabytes
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      mbps_mfactor = mbps_mfactor/(bytes_in_kilobytes);
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      mbps_mfactor = mbps_mfactor*pDatamBits;
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      // define max bandwwidth : 1 world per cycle period
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      @(sys_if.cb);
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      delta = $realtime;
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      @(sys_if.cb);
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      delta = $realtime - delta;
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      max_bandwidth = (1/delta)*mbps_mfactor;
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    end
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    endtask
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  endclass
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`endif

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