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[/] [ht_tunnel/] [trunk/] [bench/] [errorhandler_l2/] [errorhandler_sim.cpp] - Blame information for rev 19

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1 2 acastong
//errorhandler_sim.cpp
2
/* ***** BEGIN LICENSE BLOCK *****
3
 * Version: MPL 1.1
4
 *
5
 * The contents of this file are subject to the Mozilla Public License Version
6
 * 1.1 (the "License"); you may not use this file except in compliance with
7
 * the License. You may obtain a copy of the License at
8
 * http://www.mozilla.org/MPL/
9
 *
10
 * Software distributed under the License is distributed on an "AS IS" basis,
11
 * WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
12
 * for the specific language governing rights and limitations under the
13
 * License.
14
 *
15
 * The Original Code is HyperTransport Tunnel IP Core.
16
 *
17
 * The Initial Developer of the Original Code is
18
 * Ecole Polytechnique de Montreal.
19
 * Portions created by the Initial Developer are Copyright (C) 2005
20
 * the Initial Developer. All Rights Reserved.
21
 *
22
 * Contributor(s):
23
 *   Ami Castonguay <acastong@grm.polymtl.ca>
24
 *
25
 * Alternatively, the contents of this file may be used under the terms
26
 * of the Polytechnique HyperTransport Tunnel IP Core Source Code License
27
 * (the  "PHTICSCL License", see the file PHTICSCL.txt), in which case the
28
 * provisions of PHTICSCL License are applicable instead of those
29
 * above. If you wish to allow use of your version of this file only
30
 * under the terms of the PHTICSCL License and not to allow others to use
31
 * your version of this file under the MPL, indicate your decision by
32
 * deleting the provisions above and replace them with the notice and
33
 * other provisions required by the PHTICSCL License. If you do not delete
34
 * the provisions above, a recipient may use your version of this file
35
 * under either the MPL or the PHTICSCL License."
36
 *
37
 * ***** END LICENSE BLOCK ***** */
38
 
39
#include "errorhandler_sim.h"
40
#include <math.h>
41
 
42
namespace
43
{
44
        // number that shall come from a random generator to apply
45
        // signals that are considered don't cares
46
        int randomNb = 6455;
47
        // option for selecting a particular test vector
48
        int testOption = 0;
49
        sc_bv<32> ZERO_BV32 = "00000000000000000000000000000000";
50
};
51
 
52
 
53
ht_errorHandler_sim::ht_errorHandler_sim( sc_module_name name ) :
54
        sc_module(name)
55
{
56
        // Thread where processes are notified
57
        SC_THREAD(simulate);
58
 
59
        SC_METHOD(coldReset);
60
        sensitive(activate_coldReset);
61
        dont_initialize();
62
        SC_METHOD(warmReset);
63
        sensitive(activate_warmReset);
64
        dont_initialize();
65
        SC_METHOD(sendRequest);
66
        sensitive(activate_sendRequest);
67
        dont_initialize();
68
        SC_METHOD(receiveResponse);
69
        sensitive(activate_receiveResponse);
70
        dont_initialize();
71
}
72
 
73
 
74
 
75
/// Deactivate all the flag signals
76
void
77
ht_errorHandler_sim::dropFlagSignals()
78
{
79
        ro_available_eh.write( false );
80
        fc_consume_eh.write( false );
81
        csr_eoc.write( sc_bit(0) );
82
        csr_initcomplete.write( sc_bit(0) );
83
        csr_drop_uninit_link.write( sc_bit(0) );
84
}
85
 
86
/// On triggering, activate a cold reset for 20 ns
87
void
88
ht_errorHandler_sim::coldReset()
89
{
90
        next_trigger(activate_coldReset);
91
        cout << "ht_errorHandler_sim::coldReset" << endl;
92
 
93
        pwrok.write(false);
94
        resetx.write(false);
95
 
96
        next_trigger(20,SC_NS);
97
 
98
        pwrok.write(true);
99
 
100
        next_trigger(20,SC_NS);
101
 
102
        resetx.write(true);
103
 
104
        next_trigger(activate_coldReset);
105
}
106
 
107
/// On triggering, activate a warm reset for 20 ns
108
void
109
ht_errorHandler_sim::warmReset()
110
{
111
        next_trigger(activate_warmReset);
112
        cout << "ht_errorHandler_sim::warmReset" << endl;
113
 
114
        resetx.write(false);
115
 
116
        next_trigger(20,SC_NS);
117
 
118
        resetx.write(true);
119
 
120
        next_trigger(activate_warmReset);
121
}
122
 
123
/// On triggering, send signals corresponding to a test vector for 
124
/// testing the Request Packet reception interface of ht_errorHandler module
125
void
126
ht_errorHandler_sim::sendRequest()
127
{
128
        next_trigger(activate_sendRequest);
129
        cout << "ht_errorHandler_sim::sendRequest" << endl;
130
 
131
        syn_ControlPacketComplete dummyCtrlPkt; // defaults to NOP packet
132
        syn_ControlPacketComplete ctrlPkt;
133
 
134
        switch( testOption )
135
        {
136
/*
137
Tableau 60 - Tests pour le Reordering (RO)
138
 
139
Vecteur d'entrée        Actions / États intermédiaires  Vecteur de sortie
140
ro_command_eh = X
141
ro_available_eh = X
142
RO_data_associated = 1
143
RO_data_addr = X
144
RO_addr_error = X       Ne rien faire.
145
Erreur: données manquantes. Un paquet de commande n'a pas été envoyé. Une donnée ne peut donc pas y être associée.      ack_RO = 0
146
*/
147
        case 0:
148
        ro_command_eh.write( dummyCtrlPkt );
149
        ro_available_eh.write( false );
150
 
151
        break;
152
/*
153
ro_command_eh = X
154
ro_available_eh = X
155
RO_data_associated = 0
156
RO_data_addr = X
157
RO_addr_error = 1       Ne rien faire.
158
Erreur: données manquantes. Un paquet de commande n'a pas été envoyé. L'erreur d'adressage ne peut pas y être associée. ack_RO = 0
159
*/
160
        case 1:
161
        dummyCtrlPkt.error64BitExtension = true;
162
        ro_command_eh.write( dummyCtrlPkt );
163
        ro_available_eh.write( false );
164
        break;
165
 
166
/*
167
ro_command_eh = X
168
ro_available_eh = X
169
RO_data_associated = 0
170
RO_data_addr = X
171
RO_addr_error = 0       Ne rien faire.
172
Erreur: données manquantes. Un paquet de commande n'a pas été envoyé. L'erreur EOC ne peut y être associée.     ack_RO = 0
173
*/
174
        case 2:
175
        dummyCtrlPkt.error64BitExtension = false;
176
        ro_command_eh.write( dummyCtrlPkt );
177
        ro_available_eh.write( false );
178
        break;
179
 
180
/*
181
ro_command_eh = command ro_available_eh = 1
182
RO_data_associated = 0
183
RO_data_addr = X
184
RO_addr_error = 0       Pas d'erreur de type EOC. Donc on ne lit pas la commande.       ack_RO = 0
185
*/
186
        case 3:
187
        ro_command_eh.write( dummyCtrlPkt );
188
        ro_available_eh.write( true );
189
        break;
190
 
191
/*
192
ro_command_eh = command
193
ro_available_eh = 1
194
RO_data_associated = 0
195
RO_data_addr = X
196
RO_addr_error = 0       Oui une erreur de type EOC. On lit la commande. ack_RO = 1
197
*/
198
        case 4:
199
        {
200
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(randomNb);
201
        BroadcastPacket bp( "0000", "0001" );
202
        ctrlPkt.packet = bp;
203
        ro_command_eh.write( ctrlPkt );
204
        ro_available_eh.write( true );
205
        }
206
        break;
207
 
208
/*
209
ro_command_eh = command
210
ro_available_eh = 0
211
RO_data_associated = 0
212
RO_data_addr = X
213
RO_addr_error = 0       Ne rien faire.  ack_RO = 0
214
*/
215
        case 5:
216
        ro_command_eh.write( ctrlPkt );
217
        ro_available_eh.write( false );
218
        break;
219
 
220
/*
221
ro_command_eh = command
222
ro_available_eh = 1
223
RO_data_associated = 1
224
RO_data_addr = "0000"
225
RO_addr_error = 0
226
RO_EOC_error = 0        Oui une erreur de type EOC. On lit la commande. Lui associer l'adresse 0 pour la donnée associée.       ack_RO = 1
227
*/
228
        case 6:
229
        {
230
        // Has data and is posted
231
        sc_bv<64> bv;
232
        bv.range(63,32) = ZERO_BV32;
233
        bv.range(31,0) = "00000000000000000000000000101000";
234
        ReadPacket rp( bv );
235
        ctrlPkt.packet = rp;
236
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(0);
237
        ctrlPkt.error64BitExtension = false;
238
        csr_eoc.write( sc_bit(1) );
239
        ro_command_eh.write( ctrlPkt );
240
        ro_available_eh.write( true );
241
        }
242
        break;
243
 
244
/*
245
ro_command_eh = command
246
ro_available_eh = 1
247
RO_data_associated = X
248
RO_data_addr = X
249
RO_addr_error = 1
250
RO_EOC_error = 0        Oui une erreur de type EOC. On lit la commande. Lui associer une erreur d'adressage 64 bits.    ack_RO = 1
251
*/
252
        case 7:
253
        {
254
        // Has data and is posted
255
        sc_bv<64> bv;
256
        bv.range(63,32) = ZERO_BV32;
257
        bv.range(31,0) = "00000000000000000000000000101000";
258
        ReadPacket rp( bv );
259
        ctrlPkt.packet = rp;
260
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(randomNb);
261
        ctrlPkt.error64BitExtension = true;
262
        ro_command_eh.write( ctrlPkt );
263
        ro_available_eh.write( true );
264
        }
265
        break;
266
 
267
/*
268
ro_command_eh = command
269
ro_available_eh = 1
270
RO_data_associated = X
271
RO_data_addr = X
272
RO_addr_error = 1
273
RO_EOC_error = 1        Oui une erreur de type EOC. On lit la commande. Lui associer une erreur de type EOC et une erreur d'adressage 64 bits.  ack_RO = 1
274
*/
275
        case 8:
276
        {
277
        // Has data and is non posted
278
        sc_bv<64> bv;
279
        bv.range(63,32) = ZERO_BV32;
280
        bv.range(31,0) = "00000000000000000000000000001000";
281
        WritePacket wp( bv );
282
        ctrlPkt.packet = wp;
283
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(randomNb);
284
        ctrlPkt.error64BitExtension = false;
285
        csr_eoc.write( sc_bit(1) );
286
        ro_command_eh.write( ctrlPkt );
287
        ro_available_eh.write( true );
288
        }
289
        break;
290
        }
291
 
292
        next_trigger(activate_sendRequest);
293
}
294
 
295
/// On triggering, send signals corresponding to a test vector for 
296
/// testing the Response Packet sending interface of ht_errorHandler module
297
void
298
ht_errorHandler_sim::receiveResponse()
299
{
300
        next_trigger(activate_receiveResponse);
301
        cout << "ht_errorHandler_sim::receiveResponse" << endl;
302
 
303
        ControlPacketComplete ctrlPkt;
304
 
305
        switch( testOption )
306
        {
307
        /*
308
Tableau 61 - Tests pour le Flow Control et Data Buffer (FC,DB)
309
 
310
Vecteur d'entrée        Actions / États intermédiaires  Vecteur de sortie
311
fc_consume_eh = X
312
        Ne rien faire.
313
        eh_datacommand_fc = X
314
eh_available_fc = 0
315
eh_address_db = X
316
eh_drop_db = 0
317
eh_vctype_db = X
318
*/
319
        case 0:
320
        {
321
//      fc_consume_eh.write( randomNb );
322
        }
323
        break;
324
 
325
/*
326
fc_consume_eh = 1       Ne rien faire.
327
        eh_datacommand_fc = X
328
eh_available_fc = 0
329
eh_address_db = X
330
eh_drop_db = 0
331
eh_vctype_db = X
332
*/
333
        case 1:
334
        {
335
        fc_consume_eh.write( true );
336
        }
337
        break;
338
 
339
/*
340
fc_consume_eh = 0       La commande est un Broadcast. Ne rien faire.    eh_datacommand_fc = X
341
eh_available_fc = 0
342
eh_address_db = X
343
eh_drop_db = 0
344
eh_vctype_db = X
345
*/
346
        case 2:
347
        {
348
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(randomNb);
349
        BroadcastPacket bp( "0000", "0001" );
350
        ctrlPkt.packet = bp;
351
        ctrlPkt.error64BitExtension = false;
352
        csr_eoc.write( sc_bit(1) );
353
        ro_command_eh.write( ctrlPkt );
354
        ro_available_eh.write( true );
355
        }
356
        break;
357
 
358
/*
359
fc_consume_eh = 0       La commande est un NonPosted Write. Envoyer un message TgtDone. eh_datacommand_fc = command
360
eh_available_fc = 1,0
361
eh_address_db = X
362
eh_drop_db = 0
363
eh_vctype_db = X
364
*/
365
        case 3:
366
        {
367
        // Has data and is non posted
368
        sc_bv<64> bv;
369
        bv.range(63,32) = ZERO_BV32;
370
        bv.range(31,0) = "00000000000000000000000000001000";
371
        WritePacket wp( bv );
372
        ctrlPkt.packet = wp;
373
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(randomNb);
374
        csr_eoc.write( sc_bit(1) );
375
        ro_command_eh.write( ctrlPkt );
376
        ro_available_eh.write( true );
377
        }
378
        break;
379
 
380
/*
381
fc_consume_eh = 0,1,0   La commande est un NonPosted Read. Envoyer un message RdResponse. Attendre que le ack tombe à vrai puis à faux, puis envoyer le data associé.   eh_datacommand_fc = command, data
382
eh_available_fc = 1,0,1,0
383
eh_address_db = X
384
eh_drop_db = 0
385
eh_vctype_db = X
386
*/
387
        case 4:
388
        {
389
        // Has data and is non posted
390
        sc_bv<64> bv;
391
        ReadPacket rp(  "0000","10000","01010","0111",0,true);
392
 
393
        ctrlPkt.packet = rp;
394
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(0);
395
        csr_eoc.write( sc_bit(1) );
396
        ro_command_eh.write( ctrlPkt );
397
        ro_available_eh.write( true );
398
 
399
//      fc_consume_eh.write( true );
400
        }
401
        break;
402
 
403
/*
404
fc_consume_eh = 0       La commande est un Posted Write. Si du data lui est associé, écrire l'adresse ainsi que le canal de la commande. Attendre un front et mettre drop à vrai.       eh_datacommand_fc = X
405
eh_available_fc = 0
406
eh_address_db = "0000"
407
eh_drop_db = 0,1
408
eh_vctype_db = "00"
409
*/
410
        case 5:
411
        {
412
        // Has data and is posted
413
        sc_bv<64> bv;
414
        bv.range(63,32) = ZERO_BV32;
415
        bv.range(31,0) = "00000000000000000000000000101000";
416
        WritePacket wp( bv );
417
        ctrlPkt.packet = wp;
418
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(0);
419
        csr_eoc.write( sc_bit(1) );
420
        ro_command_eh.write( ctrlPkt );
421
        ro_available_eh.write( true );
422
        }
423
        break;
424
 
425
/*
426
fc_consume_eh = 0       La commande est un Posted Read. Si du data lui est associé, écrire l'adresse ainsi que le canal de la commande. Attendre un front et mettre drop à vrai.        eh_datacommand_fc = X
427
eh_available_fc = 0
428
eh_address_db = "0000"
429
eh_drop_db = 0,1
430
eh_vctype_db = "00"
431
*/
432
        case 6:
433
        {
434
        // Has data and is posted
435
        sc_bv<64> bv;
436
        bv.range(63,32) = ZERO_BV32;
437
        bv.range(31,0) = "00000000000000000000000000101000";
438
        ReadPacket rp( bv );
439
        ctrlPkt.packet = rp;
440
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(0);
441
        csr_eoc.write( sc_bit(1) );
442
        ro_command_eh.write( ctrlPkt );
443
        ro_available_eh.write( true );
444
 
445
        fc_consume_eh.write( true );
446
        }
447
        break;
448
 
449
/*
450
fc_consume_eh = 0       La commande est un Atomic. Si du data lui est associé, écrire l'adresse ainsi que le canal de la commande. Attendre un front et mettre drop à vrai.     eh_datacommand_fc = X
451
eh_available_fc = 0
452
eh_address_db = X
453
eh_drop_db = X
454
eh_vctype_db = X
455
*/
456
        case 7:
457
        {
458
        // Does not have data and is non posted
459
        sc_bv<64> bv;
460
        bv.range(63,32) = ZERO_BV32;
461
        bv.range(31,0) = ZERO_BV32;
462
        AtomicPacket ap( bv );
463
        ctrlPkt.packet = ap;
464
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(randomNb);
465
        csr_eoc.write( sc_bit(1) );
466
        ro_command_eh.write( ctrlPkt );
467
        ro_available_eh.write( true );
468
        }
469
        break;
470
 
471
/*
472
fc_consume_eh = 0       La commande est un Flush.       eh_datacommand_fc = X
473
eh_available_fc = 0
474
eh_address_db = X
475
eh_drop_db = X
476
eh_vctype_db = X
477
*/
478
        case 8:
479
        {
480
        // Does not have data and is non posted
481
        FlushPacket fp( "0001", "0000" );
482
        ctrlPkt.packet = fp;
483
        ctrlPkt.data_address = sc_uint<BUFFERS_ADDRESS_WIDTH>(randomNb);
484
        csr_eoc.write( sc_bit(1) );
485
        ro_command_eh.write( ctrlPkt );
486
        ro_available_eh.write( true );
487
        }
488
        break;
489
        }
490
 
491
        next_trigger(activate_receiveResponse);
492
 
493
}
494
 
495
 
496
/// Thread for activating the processes. Deal with timing issues.
497
void
498
ht_errorHandler_sim::simulate()
499
{
500
        while( true )
501
        {
502
                testOption = 4;
503
 
504
                cout << "ht_errorHandler_sim::simulate1" << endl;
505
                //activate_coldReset.notify();
506
                resetx.write(true);
507
                pwrok.write(true);
508
 
509
                dropFlagSignals();
510
                wait( 35, SC_NS );
511
                cout << "ht_errorHandler_sim::simulate2" << endl;
512
                activate_sendRequest.notify();
513
                wait( 40, SC_NS );
514
                cout << "ht_errorHandler_sim::simulate3" << endl;
515
                dropFlagSignals();
516
                wait( 40, SC_NS );
517
                cout << "ht_errorHandler_sim::simulate4" << endl;
518
                activate_receiveResponse.notify();
519
                wait( 40, SC_NS );
520
                fc_consume_eh.write( true );
521
                wait( 40, SC_NS );
522
                ro_available_eh.write( false );
523
                wait( 40, SC_NS );
524
                fc_consume_eh.write( false );
525
                wait( 20, SC_NS );
526
                fc_consume_eh.write( true );
527
                wait();
528
        }
529
}

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