Subversion Repositories i2c

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<b><font size=+2 face="Helvetica, Arial"

color=#bf0000>Project Name: I2C controller core</font></b>

<p>

<font size=+1><b>Description</b></font>

<P>

I2C is a two-wire, bidirectional serials bus that provide a simple, efficient method of data exchange between devices.

<BR>

You can find I2C specification on <A HREF=http://www-us.semiconductors.philips.com/acrobat/various/I2C_BUS_SPECIFICATION_3.pdf> Phillips web Site</A>.

<BR>

<p>

<font size=+1><b>What you get</b></font><p>

The simplest master I2C ever built! Requirement is low gate count so features are restricted:<BR>

<UL>

<LI>No Multimaster operation

<LI>No FIFO

<LI>No slave mode

</UL>

<BR>

The processor interface is composed of four registers:

<UL>

<LI>Timing Register (TR)

<LI>Control Register (CR)

<LI>Status Register (SR)

<LI>Data Register (DR)

</UL>

This is a copy of <I>ColdFire</I> MBUS Interface Programmer's Model from Motorola.

<P>

There is the preliminary block diagram :

<img src="Block.gif" border="0" ><br>

The design is fully synchronous, only one clock. The Timing register fix the output rate of the I2C bus.

<br>

The bus interface is not specified at this time and it would be either OR1K specific bus or APB (from AMBA specification).

<P>

Current Status:

<ul>

working on functional and design specifications

</ul>

<p>Maintainer(s):

<ul><a href=mailto:f.renet@mipsys.com_NOSPAM>Frédéric Renet</A></ul>

<p>Mailing-list:

<ul><a href=mailto:cores@opencores.org_NOSPAM>cores@opencores.org_NOSPAM</A></ul>

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