OpenCores
URL https://opencores.org/ocsvn/i2cslave/i2cslave/trunk

Subversion Repositories i2cslave

[/] [i2cslave/] [trunk/] [rtl/] [i2cSlaveTop.v] - Blame information for rev 6

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 sfielding
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
//// i2cSlaveTop.v                                                   ////
4
////                                                              ////
5
//// This file is part of the i2cSlave opencores effort.
6
//// <http://www.opencores.org/cores//>                           ////
7
////                                                              ////
8
//// Module Description:                                          ////
9
//// You will need to modify this file to implement your 
10
//// interface.
11
////                                                              ////
12
//// To Do:                                                       ////
13
//// 
14
////                                                              ////
15
//// Author(s):                                                   ////
16
//// - Steve Fielding, sfielding@base2designs.com                 ////
17
////                                                              ////
18
//////////////////////////////////////////////////////////////////////
19
////                                                              ////
20
//// Copyright (C) 2008 Steve Fielding and OPENCORES.ORG          ////
21
////                                                              ////
22
//// This source file may be used and distributed without         ////
23
//// restriction provided that this copyright statement is not    ////
24
//// removed from the file and that any derivative work contains  ////
25
//// the original copyright notice and the associated disclaimer. ////
26
////                                                              ////
27
//// This source file is free software; you can redistribute it   ////
28
//// and/or modify it under the terms of the GNU Lesser General   ////
29
//// Public License as published by the Free Software Foundation; ////
30
//// either version 2.1 of the License, or (at your option) any   ////
31
//// later version.                                               ////
32
////                                                              ////
33
//// This source is distributed in the hope that it will be       ////
34
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
35
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
36
//// PURPOSE. See the GNU Lesser General Public License for more  ////
37
//// details.                                                     ////
38
////                                                              ////
39
//// You should have received a copy of the GNU Lesser General    ////
40
//// Public License along with this source; if not, download it   ////
41
//// from <http://www.opencores.org/lgpl.shtml>                   ////
42
////                                                              ////
43
//////////////////////////////////////////////////////////////////////
44
//
45
`include "i2cSlave_define.v"
46
 
47
 
48
module i2cSlaveTop (
49
  clk,
50
  rst,
51
  sda,
52
  scl,
53
  myReg0
54
);
55
input clk;
56
input rst;
57
inout sda;
58
input scl;
59
output [7:0] myReg0;
60
 
61
 
62
i2cSlave u_i2cSlave(
63
  .clk(clk),
64
  .rst(rst),
65
  .sda(sda),
66
  .scl(scl),
67
  .myReg0(myReg0),
68
  .myReg1(),
69
  .myReg2(),
70
  .myReg3(),
71
  .myReg4(8'h12),
72
  .myReg5(8'h34),
73
  .myReg6(8'h56),
74
  .myReg7(8'h78)
75
 
76
);
77
 
78
 
79
endmodule
80
 
81
 
82
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.