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eightycc |
`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// IBM 650 Reconstruction in Verilog (i650)
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//
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// This file is part of the IBM 650 Reconstruction in Verilog (i650) project
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// http:////www.opencores.org/project,i650
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//
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// Description: Translate bi-quinary to 2-of-5 drum code.
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//
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// Additional Comments:
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//
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// Copyright (c) 2015 Robert Abeles
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//
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// This source file is free software; you can redistribute it
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// and/or modify it under the terms of the GNU Lesser General
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// Public License as published by the Free Software Foundation;
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// either version 2.1 of the License, or (at your option) any
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// later version.
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//
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// This source is distributed in the hope that it will be
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// useful, but WITHOUT ANY WARRANTY; without even the implied
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// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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// PURPOSE. See the GNU Lesser General Public License for more
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// details.
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//
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// You should have received a copy of the GNU Lesser General
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// Public License along with this source; if not, download it
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// from http://www.opencores.org/lgpl.shtml
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//////////////////////////////////////////////////////////////////////////////////
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`include "defines.v"
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module xlate7to5(
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input [0:6] in_7,
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output reg[0:4] out_5
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);
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eightycc |
always @(*) begin
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case (in_7)
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`biq_0 : out_5 = `drum2of5_0;
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`biq_1 : out_5 = `drum2of5_1;
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`biq_2 : out_5 = `drum2of5_2;
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`biq_3 : out_5 = `drum2of5_3;
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`biq_4 : out_5 = `drum2of5_4;
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`biq_5 : out_5 = `drum2of5_5;
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`biq_6 : out_5 = `drum2of5_6;
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`biq_7 : out_5 = `drum2of5_7;
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`biq_8 : out_5 = `drum2of5_8;
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`biq_9 : out_5 = `drum2of5_9;
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default : out_5 = `drum2of5_blank; // invalid codes become zeroes
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endcase;
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end;
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9 |
eightycc |
endmodule
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