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--Nama file : mux288to16x.vbe

--Deskripsi : multiplekser (18 x 16 bit) to 16 bit

--Author    : Mas Adit

--Tanggal  : 25 Agustus 2001

entity mux288to16x is

port (

        i1   : in bit_vector(15 downto 0);

        i2   : in bit_vector(15 downto 0);

        i3   : in bit_vector(15 downto 0);

        i4   : in bit_vector(15 downto 0);

        i5   : in bit_vector(15 downto 0);

        i6   : in bit_vector(15 downto 0);

        i7   : in bit_vector(15 downto 0);

        i8   : in bit_vector(15 downto 0);

        i9   : in bit_vector(15 downto 0);

        i10 : in bit_vector(15 downto 0);

        i11 : in bit_vector(15 downto 0);

        i12 : in bit_vector(15 downto 0);

        i13 : in bit_vector(15 downto 0);

        i14 : in bit_vector(15 downto 0);

        i15 : in bit_vector(15 downto 0);

        i16 : in bit_vector(15 downto 0);

        i17 : in bit_vector(15 downto 0);

        i18 : in bit_vector(15 downto 0);

        en  : in bit;

        clr  : in bit;

        sel :  in bit_vector(4 downto 0);

        c   : out bit_vector(15 downto 0);

        vdd : in bit;

        vss : in bit

);

end mux288to16x;

architecture vbe of mux288to16x is

signal temp1 : bit_vector(15 downto 0);

signal temp2 : bit_vector(15 downto 0);

signal reg : reg_vector(15 downto 0) register;

constant nol : bit_vector(15 downto 0) := "0000000000000000";

begin

with sel select

temp1 <= i1 when "00000",

              i2 when "00001",

              i3 when "00010",

              i4 when "00011",

              i5 when "00100",

              i6 when "00101",

              i7 when "00110",

              i8 when "00111",

              i9 when "01000",

              i10 when "01001",

              i11 when "01010",

              i12 when "01011",

              i13 when "01100",

              i14 when "01101",

              i15 when "01110",

              i16 when "01111",

              i17 when "10000",

              i18 when "10001",

              nol when others;

flip_flop : block ((en = '1') and not(en'STABLE))

begin

        reg <= guarded temp1;

end block;

temp2 <= nol when (clr = '1')

              else reg;

c <= temp2;

assert ((vdd = '1') and (vss = '0'))

report "power supply is missing on mux288to16x"

severity warning;

end vbe;