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-- File Name   : in_key.fsm                                     --
-- Description : The control of in key blok                     --
-- Purpose     : To be used by SYF                              --
-- Date        : Aug 30, 2001                                   --
-- Version     : 1.1                                            --
-- Author      : Sigit Dewantor                                 --
-- Address     : VLSI RG, Dept. of Electrical Engineering ITB,  --
--               Bandung, Indonesia                             --
-- E-mail      : sigit@ic.vlsi.itb.ac.id                        --
 
ENTITY in_key IS
PORT ( clk,rst,key_sended           : IN  BIT;
       en_bufin,req_key,ikey_ready  : OUT BIT;
       n_block                      : OUT BIT;
       vdd, vss                     : IN BIT
      );
END in_key;
 
ARCHITECTURE fsm OF in_key IS
 
TYPE STATE_TYPE IS (S0, S1, S2, S3, S4,S5, S6, S7);
 
-- pragma CLOCK clk
-- pragma CURRENT_STATE CURRENT_STATE
-- pragma NEXT_STATE NEXT_STATE
 
SIGNAL CURRENT_STATE, NEXT_STATE: STATE_TYPE;
 
BEGIN
  PROCESS ( CURRENT_STATE, rst)
    BEGIN
      IF ( rst = '1' ) THEN
          NEXT_STATE <= S0;
          req_key <= '1';
          en_bufin <= '0';
          ikey_ready <= '0';
          n_block  <= '0';
      ELSE
          CASE CURRENT_STATE IS
             WHEN S0 =>
                if(key_sended = '1') then
                   req_key   <= '0';
                   en_bufin <= '1';
                   ikey_ready <= '0';
                   n_block  <= '0';
                   NEXT_STATE <= S1;
                 else
                   req_key   <= '1';
                   en_bufin <= '0';
                   ikey_ready <= '0';
                   n_block  <= '0';
                   NEXT_STATE <= S0;
                 end if;
             WHEN S1 =>
                   req_key   <= '1';
                   en_bufin <= '0';
                   ikey_ready <= '0';
                   n_block  <= '1';
                   NEXT_STATE <= S2;
             WHEN S2 =>
                if(key_sended = '1') then
                   req_key   <= '0';
                   en_bufin <= '1';
                   ikey_ready <= '0';
                   n_block  <= '1';
                   NEXT_STATE <= S3;
                else
                   req_key   <= '1';
                   en_bufin <= '0';
                   ikey_ready <= '0';
                   n_block  <= '1';
                   NEXT_STATE <= S2;
                end if;
 
            WHEN S3 =>
                   req_key <= '1';
                   en_bufin <= '0';
                   ikey_ready <= '0';
                   n_block <= '1';
                   NEXT_STATE <= S4;
            WHEN S4 =>
                  if(key_sended = '1') then
                        req_key <= '0';
                        en_bufin <= '1';
                        ikey_ready <= '0';
                        n_block <= '1';
                        NEXT_STATE <= S5;
                else
                        req_key <= '1';
                        en_bufin <= '0';
                        ikey_ready <= '0';
                        n_block <= '1';
                        NEXT_STATE <= S4;
                end if;
            WHEN S5 =>
                req_key <= '1';
                en_bufin <= '0';
                ikey_ready <= '0';
                n_block <= '1';
                NEXT_STATE <= S6;
 
            WHEN S6 =>
                   req_key   <= '0';
                   en_bufin <= '0';
                   ikey_ready <= '1';
                   n_block  <= '0';
                   NEXT_STATE <= S0;
             WHEN OTHERS =>
                ASSERT ( '1' )
                REPORT "Illegal State";
 
          END CASE;
      END IF;
END PROCESS;
 
PROCESS (clk)
  BEGIN
    IF ((clk AND NOT clk'STABLE) ='1') THEN
         CURRENT_STATE <= NEXT_STATE;
    END IF;
END PROCESS;
 
END fsm;

Line No.	Rev	Author	Line
1	5	marta	`-- File Name : in_key.fsm --`
2			`-- Description : The control of in key blok --`
3			`-- Purpose : To be used by SYF --`
4			`-- Date : Aug 30, 2001 --`
5			`-- Version : 1.1 --`
6			`-- Author : Sigit Dewantor --`
7			`-- Address : VLSI RG, Dept. of Electrical Engineering ITB, --`
8			`-- Bandung, Indonesia --`
9			`-- E-mail : sigit@ic.vlsi.itb.ac.id --`
10
11			`ENTITY in_key IS`
12			`PORT ( clk,rst,key_sended : IN BIT;`
13			`en_bufin,req_key,ikey_ready : OUT BIT;`
14			`n_block : OUT BIT;`
15			`vdd, vss : IN BIT`
16			`);`
17			`END in_key;`
18
19			`ARCHITECTURE fsm OF in_key IS`
20
21			`TYPE STATE_TYPE IS (S0, S1, S2, S3, S4,S5, S6, S7);`
22
23			`-- pragma CLOCK clk`
24			`-- pragma CURRENT_STATE CURRENT_STATE`
25			`-- pragma NEXT_STATE NEXT_STATE`
26
27			`SIGNAL CURRENT_STATE, NEXT_STATE: STATE_TYPE;`
28
29			`BEGIN`
30			`PROCESS ( CURRENT_STATE, rst)`
31			`BEGIN`
32			`IF ( rst = '1' ) THEN`
33			`NEXT_STATE <= S0;`
34			`req_key <= '1';`
35			`en_bufin <= '0';`
36			`ikey_ready <= '0';`
37			`n_block <= '0';`
38			`ELSE`
39			`CASE CURRENT_STATE IS`
40			`WHEN S0 =>`
41			`if(key_sended = '1') then`
42			`req_key <= '0';`
43			`en_bufin <= '1';`
44			`ikey_ready <= '0';`
45			`n_block <= '0';`
46			`NEXT_STATE <= S1;`
47			`else`
48			`req_key <= '1';`
49			`en_bufin <= '0';`
50			`ikey_ready <= '0';`
51			`n_block <= '0';`
52			`NEXT_STATE <= S0;`
53			`end if;`
54			`WHEN S1 =>`
55			`req_key <= '1';`
56			`en_bufin <= '0';`
57			`ikey_ready <= '0';`
58			`n_block <= '1';`
59			`NEXT_STATE <= S2;`
60			`WHEN S2 =>`
61			`if(key_sended = '1') then`
62			`req_key <= '0';`
63			`en_bufin <= '1';`
64			`ikey_ready <= '0';`
65			`n_block <= '1';`
66			`NEXT_STATE <= S3;`
67			`else`
68			`req_key <= '1';`
69			`en_bufin <= '0';`
70			`ikey_ready <= '0';`
71			`n_block <= '1';`
72			`NEXT_STATE <= S2;`
73			`end if;`
74
75			`WHEN S3 =>`
76			`req_key <= '1';`
77			`en_bufin <= '0';`
78			`ikey_ready <= '0';`
79			`n_block <= '1';`
80			`NEXT_STATE <= S4;`
81			`WHEN S4 =>`
82			`if(key_sended = '1') then`
83			`req_key <= '0';`
84			`en_bufin <= '1';`
85			`ikey_ready <= '0';`
86			`n_block <= '1';`
87			`NEXT_STATE <= S5;`
88			`else`
89			`req_key <= '1';`
90			`en_bufin <= '0';`
91			`ikey_ready <= '0';`
92			`n_block <= '1';`
93			`NEXT_STATE <= S4;`
94			`end if;`
95			`WHEN S5 =>`
96			`req_key <= '1';`
97			`en_bufin <= '0';`
98			`ikey_ready <= '0';`
99			`n_block <= '1';`
100			`NEXT_STATE <= S6;`
101
102			`WHEN S6 =>`
103			`req_key <= '0';`
104			`en_bufin <= '0';`
105			`ikey_ready <= '1';`
106			`n_block <= '0';`
107			`NEXT_STATE <= S0;`
108			`WHEN OTHERS =>`
109			`ASSERT ( '1' )`
110			`REPORT "Illegal State";`
111
112			`END CASE;`
113			`END IF;`
114			`END PROCESS;`
115
116			`PROCESS (clk)`
117			`BEGIN`
118			`IF ((clk AND NOT clk'STABLE) ='1') THEN`
119			`CURRENT_STATE <= NEXT_STATE;`
120			`END IF;`
121			`END PROCESS;`
122
123			`END fsm;`

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[/] [idea/] [trunk/] [fsm/] [in_key.fsm] - Blame information for rev 9