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[/] [idea/] [trunk/] [fsm/] [key_regulator/] [kontrol_utama_invmulx.fsm] - Blame information for rev 9

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--Nama file : kontrol_utama_invmulx.fsm
--Deskripsi : koontrol utama inv_mul (2^16 + 1)
--Author    : Mas Adit
--Tanggal  : 26 Agustus 2001
 
entity kontrol_utama_invmulx is
port (
        start : in bit;
        clk : in bit;
        rst : in bit;
        n_stage : in bit_vector( 1 downto 0);
        n_iterasi : in bit_vector(3 downto 0);
        n_dtin : in bit_vector(4 downto 0);
        n_dtout : in bit_vector(4 downto 0);
        en_cstage : out bit;
        c_cstage :  out bit;
        en_cite :  out bit;
        c_cite :  out bit;
        en_cdtin :  out bit;
        c_cdtin :  out bit;
        en_cdtout :  out bit;
        c_cdtout :  out bit;
        en_in :  out bit;
        en_out :  out bit;
        en_pipe :  out bit;
        sel :  out bit;
        finish :  out bit;
        vdd : in bit;
        vss : in bit
);
end kontrol_utama_invmulx;
 
architecture STATE_MACHINE of kontrol_utama_invmulx is
 
type STATE_TYPE is (S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15, S16, S17, S18, S19, S20, S21);
        --pragma CLOCK clk
        --pragma CURRENT_STATE CURRENT_STATE
        --pragma NEXT_STATE NEXT_STATE
signal CURRENT_STATE, NEXT_STATE : STATE_TYPE;
 
begin
 
process (CURRENT_STATE, rst, start, n_dtout, n_iterasi, n_stage)
begin
        if (rst = '1') then
                NEXT_STATE <= S0;
                en_cstage <= '0';
                c_cstage <= '0';
                en_cite <= '0';
                c_cite <= '0';
                en_cdtin <= '0';
                c_cdtin <= '0';
                en_cdtout <= '0';
                c_cdtout <= '0';
                en_in <= '0';
                en_out <= '0';
                en_pipe <= '0';
                sel <= '0';
                finish <= '0';
        else
                case CURRENT_STATE is
 
                when S0 =>
                if (start = '1') then
                        if not(n_dtout = "10010") then
                                NEXT_STATE <= S1;
                                en_cstage <= '0';
                                c_cstage <= '0';
                                en_cite <= '0';
                                c_cite <= '0';
                                en_cdtin <= '0';
                                c_cdtin <= '0';
                                en_cdtout <= '0';
                                c_cdtout <= '0';
                                en_in <= '0';
                                en_out <= '0';
                                en_pipe <= '0';
                                sel <= '0';
                                finish <= '1';
                        else
                                if (n_iterasi = "0000") then
                                        if (n_stage = "00") then
                                                NEXT_STATE <= S2;
                                                en_cstage <= '0';
                                                c_cstage <= '0';
                                                en_cite <= '0';
                                                c_cite <= '0';
                                                en_cdtin <= '1';
                                                c_cdtin <= '0';
                                                en_cdtout <= '0';
                                                c_cdtout <= '0';
                                                en_in <= '1';
                                                en_out <= '0';
                                                en_pipe <= '0';
                                                sel <= '0';
                                                finish <= '0';
                                        else
                                                NEXT_STATE <= S4;
                                                en_cstage <= '0';
                                                c_cstage <= '0';
                                                en_cite <= '1';
                                                c_cite <= '0';
                                                en_cdtin <= '1';
                                                c_cdtin <= '1';
                                                en_cdtout <= '0';
                                                c_cdtout <= '0';
                                                en_in <= '0';
                                                en_out <= '0';
                                                en_pipe <= '1';
                                                sel <= '1';
                                                finish <= '0';
                                        end if;
                                else
                                        if (n_iterasi = "1111") then
                                                NEXT_STATE <= S16;
                                                en_cstage <= '0';
                                                c_cstage <= '0';
                                                en_cite <= '1';
                                                c_cite <= '0';
                                                en_cdtin <= '0';
                                                c_cdtin <= '0';
                                                en_cdtout <= '0';
                                                c_cdtout <= '0';
                                                en_in <= '0';
                                                en_out <= '1';
                                                en_pipe <= '1';
                                                sel <= '0';
                                                finish <= '0';
                                        else
                                                NEXT_STATE <= S10;
                                                en_cstage <= '0';
                                                c_cstage <= '0';
                                                en_cite <= '1';
                                                c_cite <= '0';
                                                en_cdtin <= '0';
                                                c_cdtin <= '0';
                                                en_cdtout <= '0';
                                                c_cdtout <= '0';
                                                en_in <= '0';
                                                en_out <= '0';
                                                en_pipe <= '1';
                                                sel <= '0';
                                                finish <= '0';
                                        end if;
                                end if;
                        end if;
                else
                        NEXT_STATE <= S0;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '0';
                        c_cite <= '0';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
                end if;
 
                when S1 =>
                        NEXT_STATE <= S1;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '0';
                        c_cite <= '0';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '1';
 
                when S2 =>
                        NEXT_STATE <= S3;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '0';
                        c_cite <= '0';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '1';
                        finish <= '0';
 
                when S3 =>
                        NEXT_STATE <= S4;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '0';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '1';
                        sel <= '1';
                        finish <= '0';
 
                 when S4 =>
                if (n_stage = "10") then
                        NEXT_STATE <= S5;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '0';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '1';
                        sel <= '1';
                        finish <= '0';
                else
                        NEXT_STATE <= S6;
                        en_cstage <= '1';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '0';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '1';
                        en_out <= '0';
                        en_pipe <= '1';
                        sel <= '1';
                        finish <= '0';
                end if;
 
                when S5 =>
                        NEXT_STATE <= S7;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '1';
                        sel <= '0';
                        finish <= '0';
 
                when S6 =>
                        NEXT_STATE <= S8;
                        en_cstage <= '1';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '0';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '1';
                        en_out <= '0';
                        en_pipe <= '1';
                        sel <= '1';
                        finish <= '0';
 
                when S7 =>
                        NEXT_STATE <= S9;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S8 =>
                        NEXT_STATE <= S9;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S9 =>
                        NEXT_STATE <= S9;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '1';
                        c_cdtin <= '1';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S10 =>
                if (n_stage = "10") then
                        NEXT_STATE <= S11;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '0';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '1';
                        sel <= '0';
                        finish <= '0';
                else
                        NEXT_STATE <= S12;
                        en_cstage <= '1';
                         c_cstage <= '0';
                         en_cite <= '1';
                         c_cite <= '0';
                         en_cdtin <= '0';
                         c_cdtin <= '0';
                         en_cdtout <= '0';
                         c_cdtout <= '0';
                         en_in <= '0';
                         en_out <= '0';
                         en_pipe <= '1';
                         sel <= '0';
                         finish <= '0';
                end if;
 
                when S11 =>
                        NEXT_STATE <= S13;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '1';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '1';
                        sel <= '0';
                        finish <= '0';
 
                when S12 =>
                        NEXT_STATE <= S14;
                        en_cstage <= '1';
                         c_cstage <= '0';
                         en_cite <= '1';
                         c_cite <= '0';
                         en_cdtin <= '0';
                         c_cdtin <= '0';
                         en_cdtout <= '0';
                         c_cdtout <= '0';
                         en_in <= '0';
                         en_out <= '0';
                         en_pipe <= '1';
                         sel <= '0';
                         finish <= '0';
 
                when S13 =>
                        NEXT_STATE <= S15;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '1';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S14 =>
                        NEXT_STATE <= S15;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '1';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S15 =>
                        NEXT_STATE <= S15;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '1';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '1';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S16 =>
                if (n_stage = "10") then
                        NEXT_STATE <= S17;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '0';
                        c_cite <= '0';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '1';
                        en_pipe <= '1';
                        sel <= '0';
                        finish <= '0';
                else
                        NEXT_STATE <= S18;
                        en_cstage <= '1';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '0';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '1';
                        en_pipe <= '1';
                        sel <= '0';
                        finish <= '0';
                end if;
 
                when S17 =>
                        NEXT_STATE <= S19;
                        en_cstage <= '0';
                        c_cstage <= '0';
                        en_cite <= '0';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '1';
                        en_pipe <= '1';
                        sel <= '0';
                        finish <= '0';
 
                when S18 =>
                        NEXT_STATE <= S20;
                        en_cstage <= '1';
                        c_cstage <= '0';
                        en_cite <= '1';
                        c_cite <= '0';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '0';
                        en_in <= '0';
                        en_out <= '1';
                        en_pipe <= '1';
                        sel <= '0';
                        finish <= '0';
 
                when S19 =>
                        NEXT_STATE <= S21;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '0';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '1';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S20 =>
                        NEXT_STATE <= S21;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '0';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '1';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                when S21 =>
                        NEXT_STATE <= S21;
                        en_cstage <= '0';
                        c_cstage <= '1';
                        en_cite <= '0';
                        c_cite <= '1';
                        en_cdtin <= '0';
                        c_cdtin <= '0';
                        en_cdtout <= '0';
                        c_cdtout <= '1';
                        en_in <= '0';
                        en_out <= '0';
                        en_pipe <= '0';
                        sel <= '0';
                        finish <= '0';
 
                end case;
        end if;
end process;
 
process (clk)
begin
        if ((clk = '0') and not(clk'STABLE)) then
        CURRENT_STATE <= NEXT_STATE;
        end if;
end process;
 
end STATE_MACHINE;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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[/] [idea/] [trunk/] [fsm/] [key_regulator/] [kontrol_utama_invmulx.fsm] - Blame information for rev 9

Line No.	Rev	Author	Line
1	6	marta	`--Nama file : kontrol_utama_invmulx.fsm`
2			`--Deskripsi : koontrol utama inv_mul (2^16 + 1)`
3			`--Author : Mas Adit`
4			`--Tanggal : 26 Agustus 2001`
5
6			`entity kontrol_utama_invmulx is`
7			`port (`
8			`start : in bit;`
9			`clk : in bit;`
10			`rst : in bit;`
11			`n_stage : in bit_vector( 1 downto 0);`
12			`n_iterasi : in bit_vector(3 downto 0);`
13			`n_dtin : in bit_vector(4 downto 0);`
14			`n_dtout : in bit_vector(4 downto 0);`
15			`en_cstage : out bit;`
16			`c_cstage : out bit;`
17			`en_cite : out bit;`
18			`c_cite : out bit;`
19			`en_cdtin : out bit;`
20			`c_cdtin : out bit;`
21			`en_cdtout : out bit;`
22			`c_cdtout : out bit;`
23			`en_in : out bit;`
24			`en_out : out bit;`
25			`en_pipe : out bit;`
26			`sel : out bit;`
27			`finish : out bit;`
28			`vdd : in bit;`
29			`vss : in bit`
30			`);`
31			`end kontrol_utama_invmulx;`
32
33			`architecture STATE_MACHINE of kontrol_utama_invmulx is`
34
35			`type STATE_TYPE is (S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15, S16, S17, S18, S19, S20, S21);`
36			`--pragma CLOCK clk`
37			`--pragma CURRENT_STATE CURRENT_STATE`
38			`--pragma NEXT_STATE NEXT_STATE`
39			`signal CURRENT_STATE, NEXT_STATE : STATE_TYPE;`
40
41			`begin`
42
43			`process (CURRENT_STATE, rst, start, n_dtout, n_iterasi, n_stage)`
44			`begin`
45			`if (rst = '1') then`
46			`NEXT_STATE <= S0;`
47			`en_cstage <= '0';`
48			`c_cstage <= '0';`
49			`en_cite <= '0';`
50			`c_cite <= '0';`
51			`en_cdtin <= '0';`
52			`c_cdtin <= '0';`
53			`en_cdtout <= '0';`
54			`c_cdtout <= '0';`
55			`en_in <= '0';`
56			`en_out <= '0';`
57			`en_pipe <= '0';`
58			`sel <= '0';`
59			`finish <= '0';`
60			`else`
61			`case CURRENT_STATE is`
62
63			`when S0 =>`
64			`if (start = '1') then`
65			`if not(n_dtout = "10010") then`
66			`NEXT_STATE <= S1;`
67			`en_cstage <= '0';`
68			`c_cstage <= '0';`
69			`en_cite <= '0';`
70			`c_cite <= '0';`
71			`en_cdtin <= '0';`
72			`c_cdtin <= '0';`
73			`en_cdtout <= '0';`
74			`c_cdtout <= '0';`
75			`en_in <= '0';`
76			`en_out <= '0';`
77			`en_pipe <= '0';`
78			`sel <= '0';`
79			`finish <= '1';`
80			`else`
81			`if (n_iterasi = "0000") then`
82			`if (n_stage = "00") then`
83			`NEXT_STATE <= S2;`
84			`en_cstage <= '0';`
85			`c_cstage <= '0';`
86			`en_cite <= '0';`
87			`c_cite <= '0';`
88			`en_cdtin <= '1';`
89			`c_cdtin <= '0';`
90			`en_cdtout <= '0';`
91			`c_cdtout <= '0';`
92			`en_in <= '1';`
93			`en_out <= '0';`
94			`en_pipe <= '0';`
95			`sel <= '0';`
96			`finish <= '0';`
97			`else`
98			`NEXT_STATE <= S4;`
99			`en_cstage <= '0';`
100			`c_cstage <= '0';`
101			`en_cite <= '1';`
102			`c_cite <= '0';`
103			`en_cdtin <= '1';`
104			`c_cdtin <= '1';`
105			`en_cdtout <= '0';`
106			`c_cdtout <= '0';`
107			`en_in <= '0';`
108			`en_out <= '0';`
109			`en_pipe <= '1';`
110			`sel <= '1';`
111			`finish <= '0';`
112			`end if;`
113			`else`
114			`if (n_iterasi = "1111") then`
115			`NEXT_STATE <= S16;`
116			`en_cstage <= '0';`
117			`c_cstage <= '0';`
118			`en_cite <= '1';`
119			`c_cite <= '0';`
120			`en_cdtin <= '0';`
121			`c_cdtin <= '0';`
122			`en_cdtout <= '0';`
123			`c_cdtout <= '0';`
124			`en_in <= '0';`
125			`en_out <= '1';`
126			`en_pipe <= '1';`
127			`sel <= '0';`
128			`finish <= '0';`
129			`else`
130			`NEXT_STATE <= S10;`
131			`en_cstage <= '0';`
132			`c_cstage <= '0';`
133			`en_cite <= '1';`
134			`c_cite <= '0';`
135			`en_cdtin <= '0';`
136			`c_cdtin <= '0';`
137			`en_cdtout <= '0';`
138			`c_cdtout <= '0';`
139			`en_in <= '0';`
140			`en_out <= '0';`
141			`en_pipe <= '1';`
142			`sel <= '0';`
143			`finish <= '0';`
144			`end if;`
145			`end if;`
146			`end if;`
147			`else`
148			`NEXT_STATE <= S0;`
149			`en_cstage <= '0';`
150			`c_cstage <= '0';`
151			`en_cite <= '0';`
152			`c_cite <= '0';`
153			`en_cdtin <= '0';`
154			`c_cdtin <= '0';`
155			`en_cdtout <= '0';`
156			`c_cdtout <= '0';`
157			`en_in <= '0';`
158			`en_out <= '0';`
159			`en_pipe <= '0';`
160			`sel <= '0';`
161			`finish <= '0';`
162			`end if;`
163
164			`when S1 =>`
165			`NEXT_STATE <= S1;`
166			`en_cstage <= '0';`
167			`c_cstage <= '0';`
168			`en_cite <= '0';`
169			`c_cite <= '0';`
170			`en_cdtin <= '0';`
171			`c_cdtin <= '0';`
172			`en_cdtout <= '0';`
173			`c_cdtout <= '0';`
174			`en_in <= '0';`
175			`en_out <= '0';`
176			`en_pipe <= '0';`
177			`sel <= '0';`
178			`finish <= '1';`
179
180			`when S2 =>`
181			`NEXT_STATE <= S3;`
182			`en_cstage <= '0';`
183			`c_cstage <= '0';`
184			`en_cite <= '0';`
185			`c_cite <= '0';`
186			`en_cdtin <= '1';`
187			`c_cdtin <= '1';`
188			`en_cdtout <= '0';`
189			`c_cdtout <= '0';`
190			`en_in <= '0';`
191			`en_out <= '0';`
192			`en_pipe <= '0';`
193			`sel <= '1';`
194			`finish <= '0';`
195
196			`when S3 =>`
197			`NEXT_STATE <= S4;`
198			`en_cstage <= '0';`
199			`c_cstage <= '0';`
200			`en_cite <= '1';`
201			`c_cite <= '0';`
202			`en_cdtin <= '1';`
203			`c_cdtin <= '1';`
204			`en_cdtout <= '0';`
205			`c_cdtout <= '0';`
206			`en_in <= '0';`
207			`en_out <= '0';`
208			`en_pipe <= '1';`
209			`sel <= '1';`
210			`finish <= '0';`
211
212			`when S4 =>`
213			`if (n_stage = "10") then`
214			`NEXT_STATE <= S5;`
215			`en_cstage <= '0';`
216			`c_cstage <= '0';`
217			`en_cite <= '1';`
218			`c_cite <= '0';`
219			`en_cdtin <= '1';`
220			`c_cdtin <= '1';`
221			`en_cdtout <= '0';`
222			`c_cdtout <= '0';`
223			`en_in <= '0';`
224			`en_out <= '0';`
225			`en_pipe <= '1';`
226			`sel <= '1';`
227			`finish <= '0';`
228			`else`
229			`NEXT_STATE <= S6;`
230			`en_cstage <= '1';`
231			`c_cstage <= '0';`
232			`en_cite <= '1';`
233			`c_cite <= '0';`
234			`en_cdtin <= '1';`
235			`c_cdtin <= '1';`
236			`en_cdtout <= '0';`
237			`c_cdtout <= '0';`
238			`en_in <= '1';`
239			`en_out <= '0';`
240			`en_pipe <= '1';`
241			`sel <= '1';`
242			`finish <= '0';`
243			`end if;`
244
245			`when S5 =>`
246			`NEXT_STATE <= S7;`
247			`en_cstage <= '0';`
248			`c_cstage <= '0';`
249			`en_cite <= '1';`
250			`c_cite <= '1';`
251			`en_cdtin <= '1';`
252			`c_cdtin <= '1';`
253			`en_cdtout <= '0';`
254			`c_cdtout <= '0';`
255			`en_in <= '0';`
256			`en_out <= '0';`
257			`en_pipe <= '1';`
258			`sel <= '0';`
259			`finish <= '0';`
260
261			`when S6 =>`
262			`NEXT_STATE <= S8;`
263			`en_cstage <= '1';`
264			`c_cstage <= '0';`
265			`en_cite <= '1';`
266			`c_cite <= '0';`
267			`en_cdtin <= '1';`
268			`c_cdtin <= '1';`
269			`en_cdtout <= '0';`
270			`c_cdtout <= '0';`
271			`en_in <= '1';`
272			`en_out <= '0';`
273			`en_pipe <= '1';`
274			`sel <= '1';`
275			`finish <= '0';`
276
277			`when S7 =>`
278			`NEXT_STATE <= S9;`
279			`en_cstage <= '0';`
280			`c_cstage <= '1';`
281			`en_cite <= '1';`
282			`c_cite <= '1';`
283			`en_cdtin <= '1';`
284			`c_cdtin <= '1';`
285			`en_cdtout <= '0';`
286			`c_cdtout <= '0';`
287			`en_in <= '0';`
288			`en_out <= '0';`
289			`en_pipe <= '0';`
290			`sel <= '0';`
291			`finish <= '0';`
292
293			`when S8 =>`
294			`NEXT_STATE <= S9;`
295			`en_cstage <= '0';`
296			`c_cstage <= '1';`
297			`en_cite <= '1';`
298			`c_cite <= '1';`
299			`en_cdtin <= '1';`
300			`c_cdtin <= '1';`
301			`en_cdtout <= '0';`
302			`c_cdtout <= '0';`
303			`en_in <= '0';`
304			`en_out <= '0';`
305			`en_pipe <= '0';`
306			`sel <= '0';`
307			`finish <= '0';`
308
309			`when S9 =>`
310			`NEXT_STATE <= S9;`
311			`en_cstage <= '0';`
312			`c_cstage <= '1';`
313			`en_cite <= '1';`
314			`c_cite <= '1';`
315			`en_cdtin <= '1';`
316			`c_cdtin <= '1';`
317			`en_cdtout <= '0';`
318			`c_cdtout <= '0';`
319			`en_in <= '0';`
320			`en_out <= '0';`
321			`en_pipe <= '0';`
322			`sel <= '0';`
323			`finish <= '0';`
324
325			`when S10 =>`
326			`if (n_stage = "10") then`
327			`NEXT_STATE <= S11;`
328			`en_cstage <= '0';`
329			`c_cstage <= '0';`
330			`en_cite <= '1';`
331			`c_cite <= '0';`
332			`en_cdtin <= '0';`
333			`c_cdtin <= '0';`
334			`en_cdtout <= '0';`
335			`c_cdtout <= '0';`
336			`en_in <= '0';`
337			`en_out <= '0';`
338			`en_pipe <= '1';`
339			`sel <= '0';`
340			`finish <= '0';`
341			`else`
342			`NEXT_STATE <= S12;`
343			`en_cstage <= '1';`
344			`c_cstage <= '0';`
345			`en_cite <= '1';`
346			`c_cite <= '0';`
347			`en_cdtin <= '0';`
348			`c_cdtin <= '0';`
349			`en_cdtout <= '0';`
350			`c_cdtout <= '0';`
351			`en_in <= '0';`
352			`en_out <= '0';`
353			`en_pipe <= '1';`
354			`sel <= '0';`
355			`finish <= '0';`
356			`end if;`
357
358			`when S11 =>`
359			`NEXT_STATE <= S13;`
360			`en_cstage <= '0';`
361			`c_cstage <= '0';`
362			`en_cite <= '1';`
363			`c_cite <= '1';`
364			`en_cdtin <= '0';`
365			`c_cdtin <= '0';`
366			`en_cdtout <= '1';`
367			`c_cdtout <= '0';`
368			`en_in <= '0';`
369			`en_out <= '0';`
370			`en_pipe <= '1';`
371			`sel <= '0';`
372			`finish <= '0';`
373
374			`when S12 =>`
375			`NEXT_STATE <= S14;`
376			`en_cstage <= '1';`
377			`c_cstage <= '0';`
378			`en_cite <= '1';`
379			`c_cite <= '0';`
380			`en_cdtin <= '0';`
381			`c_cdtin <= '0';`
382			`en_cdtout <= '0';`
383			`c_cdtout <= '0';`
384			`en_in <= '0';`
385			`en_out <= '0';`
386			`en_pipe <= '1';`
387			`sel <= '0';`
388			`finish <= '0';`
389
390			`when S13 =>`
391			`NEXT_STATE <= S15;`
392			`en_cstage <= '0';`
393			`c_cstage <= '1';`
394			`en_cite <= '1';`
395			`c_cite <= '1';`
396			`en_cdtin <= '0';`
397			`c_cdtin <= '0';`
398			`en_cdtout <= '1';`
399			`c_cdtout <= '0';`
400			`en_in <= '0';`
401			`en_out <= '0';`
402			`en_pipe <= '0';`
403			`sel <= '0';`
404			`finish <= '0';`
405
406			`when S14 =>`
407			`NEXT_STATE <= S15;`
408			`en_cstage <= '0';`
409			`c_cstage <= '1';`
410			`en_cite <= '1';`
411			`c_cite <= '1';`
412			`en_cdtin <= '0';`
413			`c_cdtin <= '0';`
414			`en_cdtout <= '1';`
415			`c_cdtout <= '0';`
416			`en_in <= '0';`
417			`en_out <= '0';`
418			`en_pipe <= '0';`
419			`sel <= '0';`
420			`finish <= '0';`
421
422			`when S15 =>`
423			`NEXT_STATE <= S15;`
424			`en_cstage <= '0';`
425			`c_cstage <= '1';`
426			`en_cite <= '1';`
427			`c_cite <= '1';`
428			`en_cdtin <= '0';`
429			`c_cdtin <= '0';`
430			`en_cdtout <= '1';`
431			`c_cdtout <= '0';`
432			`en_in <= '0';`
433			`en_out <= '0';`
434			`en_pipe <= '0';`
435			`sel <= '0';`
436			`finish <= '0';`
437
438			`when S16 =>`
439			`if (n_stage = "10") then`
440			`NEXT_STATE <= S17;`
441			`en_cstage <= '0';`
442			`c_cstage <= '0';`
443			`en_cite <= '0';`
444			`c_cite <= '0';`
445			`en_cdtin <= '0';`
446			`c_cdtin <= '0';`
447			`en_cdtout <= '0';`
448			`c_cdtout <= '0';`
449			`en_in <= '0';`
450			`en_out <= '1';`
451			`en_pipe <= '1';`
452			`sel <= '0';`
453			`finish <= '0';`
454			`else`
455			`NEXT_STATE <= S18;`
456			`en_cstage <= '1';`
457			`c_cstage <= '0';`
458			`en_cite <= '1';`
459			`c_cite <= '0';`
460			`en_cdtin <= '0';`
461			`c_cdtin <= '0';`
462			`en_cdtout <= '0';`
463			`c_cdtout <= '0';`
464			`en_in <= '0';`
465			`en_out <= '1';`
466			`en_pipe <= '1';`
467			`sel <= '0';`
468			`finish <= '0';`
469			`end if;`
470
471			`when S17 =>`
472			`NEXT_STATE <= S19;`
473			`en_cstage <= '0';`
474			`c_cstage <= '0';`
475			`en_cite <= '0';`
476			`c_cite <= '1';`
477			`en_cdtin <= '0';`
478			`c_cdtin <= '0';`
479			`en_cdtout <= '0';`
480			`c_cdtout <= '0';`
481			`en_in <= '0';`
482			`en_out <= '1';`
483			`en_pipe <= '1';`
484			`sel <= '0';`
485			`finish <= '0';`
486
487			`when S18 =>`
488			`NEXT_STATE <= S20;`
489			`en_cstage <= '1';`
490			`c_cstage <= '0';`
491			`en_cite <= '1';`
492			`c_cite <= '0';`
493			`en_cdtin <= '0';`
494			`c_cdtin <= '0';`
495			`en_cdtout <= '0';`
496			`c_cdtout <= '0';`
497			`en_in <= '0';`
498			`en_out <= '1';`
499			`en_pipe <= '1';`
500			`sel <= '0';`
501			`finish <= '0';`
502
503			`when S19 =>`
504			`NEXT_STATE <= S21;`
505			`en_cstage <= '0';`
506			`c_cstage <= '1';`
507			`en_cite <= '0';`
508			`c_cite <= '1';`
509			`en_cdtin <= '0';`
510			`c_cdtin <= '0';`
511			`en_cdtout <= '0';`
512			`c_cdtout <= '1';`
513			`en_in <= '0';`
514			`en_out <= '0';`
515			`en_pipe <= '0';`
516			`sel <= '0';`
517			`finish <= '0';`
518
519			`when S20 =>`
520			`NEXT_STATE <= S21;`
521			`en_cstage <= '0';`
522			`c_cstage <= '1';`
523			`en_cite <= '0';`
524			`c_cite <= '1';`
525			`en_cdtin <= '0';`
526			`c_cdtin <= '0';`
527			`en_cdtout <= '0';`
528			`c_cdtout <= '1';`
529			`en_in <= '0';`
530			`en_out <= '0';`
531			`en_pipe <= '0';`
532			`sel <= '0';`
533			`finish <= '0';`
534
535			`when S21 =>`
536			`NEXT_STATE <= S21;`
537			`en_cstage <= '0';`
538			`c_cstage <= '1';`
539			`en_cite <= '0';`
540			`c_cite <= '1';`
541			`en_cdtin <= '0';`
542			`c_cdtin <= '0';`
543			`en_cdtout <= '0';`
544			`c_cdtout <= '1';`
545			`en_in <= '0';`
546			`en_out <= '0';`
547			`en_pipe <= '0';`
548			`sel <= '0';`
549			`finish <= '0';`
550
551			`end case;`
552			`end if;`
553			`end process;`
554
555			`process (clk)`
556			`begin`
557			`if ((clk = '0') and not(clk'STABLE)) then`
558			`CURRENT_STATE <= NEXT_STATE;`
559			`end if;`
560			`end process;`
561
562			`end STATE_MACHINE;`
563
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