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[/] [igor/] [trunk/] [avr/] [eth-test/] [dev/] [spi.c] - Blame information for rev 4

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1 4 atypic
#include "spi.h"
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#include <avr/io.h>
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void configure_spi(void)
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{
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        //Set pins as output
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        SPI_DDR |= (1<<SPI_SCK) | (1<<SPI_MOSI) | (1<<SPI_SS_MMC) | (1<<SPI_SS_ETHERNET);
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        //Set pins as input
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        SPI_DDR &= ~(1<<SPI_MISO);
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        //Activate pull-up on MISO and set both SS lines high (deasserted)
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        SPI_PORT |= (1<<SPI_MISO) | (1<<SPI_SS_MMC) | (1<<SPI_SS_ETHERNET);
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        //Drive SCK and MOSI low
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        SPI_PORT &= ~((1<<SPI_SCK) | (1<<SPI_MOSI));
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        // Disable SPI powersaving
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        PRR0 &= ~(1<<PRSPI);
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        /*Configure SPI interface:
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        * Disable SPI interrupts
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        * Enable SPI
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        * Set data order MSB first
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        * Set SPI master mode
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        * Set clock polarity idle low
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        * Set clock phase to sample on rising edge
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        * Set SPI speed to freq_cpu/4
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        */
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        SPCR = (0<<SPIE)|(1<<SPE)|(0<<DORD)|(1<<MSTR)|(0<<CPOL)|(0<<CPHA)|(0<<SPR1)|(0<<SPR0);
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        //Activate SPI2X, doubling the speed set in the previous register
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        SPSR = (1<<SPI2X);
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}

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