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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [accumulator.v] - Blame information for rev 9

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`include "timescale.v"
`include "defines.v"
 
 
module accumulator (accIn, accEn, accOut);
 
        input [7:0] accIn;
        input accEn;
 
        output [7:0] accOut;
 
        reg [7:0] accOut;
 
        always @ (accEn)
        begin
                if (accEn)
                begin
                        accOut = accIn;
                        $write ("\n%b   data written to accumulator     :       module accumulator      ", accIn);
                end
                else
                begin
                        accOut = accOut;
                end
        end     // end always
 
 
endmodule

Line No.	Rev	Author	Line
1	3	maheshpalv
2			`include "timescale.v"
3			`include "defines.v"
4
5
6			`module accumulator (accIn, accEn, accOut);`
7
8			`input [7:0] accIn;`
9			`input accEn;`
10
11			`output [7:0] accOut;`
12
13			`reg [7:0] accOut;`
14
15	9	maheshpalv	`always @ (accEn)`
16	3	maheshpalv	`begin`
17			`if (accEn)`
18			`begin`
19			`accOut = accIn;`
20	8	maheshpalv	`$write ("\n%b data written to accumulator : module accumulator ", accIn);`
21	3	maheshpalv	`end`
22			`else`
23			`begin`
24			`accOut = accOut;`
25			`end`
26			`end // end always`
27
28
29			`endmodule`

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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [accumulator.v] - Blame information for rev 9