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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [controlUnit.v] - Blame information for rev 6

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1 3 maheshpalv 
 
2 
`include "timescale.v"
3 
`include "defines.v"
4 
 
5 
 
6 5 maheshpalv 
module controlUnit (clk, reset, instOpCode, acc0, iomemCode,
7 3 maheshpalv 
                                                        branch,
8 6 maheshpalv 
                                                        accMuxSel, accEn, op2MuxSel, aluEn, aluOpcode,
9 3 maheshpalv 
                                                        bitRamEn, bitRamRw, byteRamEn, byteRamRw,
10 
                                                        inputRead, outputRw
11 
 
12 
                                                        `ifdef timerAndCounter_peripheral
13 
                                                                , entypeEn, tcAccRead, tcResetEn, tcPresetEn, tcLoadEn
14 
                                                        `endif
15 
 
16 
                                                        `ifdef UART_peripheral
17 
                                                                , uartRead, uartWrite
18 
                                                        `endif
19 
 
20 
                                                        `ifdef SPI_peripheral
21 
                                                                , sconEn, spiStatRead, spiBufRead, spiBufWrite, spiBufShift
22 
                                                        `endif
23 
 
24 
                                                        );
25 
 
26 
 
27 
        input clk, reset;
28 
        input [`instOpCodeLen-1:0] instOpCode;
29 
        input acc0;
30 
        input [1:0] iomemCode;
31 
 
32 
        output branch;
33 
        output [`accMuxSelLen-1:0]       accMuxSel;
34 
        output accEn;
35 
        output [`op2MuxSelLen-1:0]       op2MuxSel;
36 6 maheshpalv 
        output aluEn;
37 3 maheshpalv 
        output [`aluOpcodeLen-1:0] aluOpcode;
38 
        output bitRamEn, bitRamRw, byteRamEn, byteRamRw;
39 
        output inputRead, outputRw;
40 
 
41 
        `ifdef timerAndCounter_peripheral
42 
        output entypeEn, tcAccRead, tcResetEn, tcPresetEn, tcLoadEn;
43 5 maheshpalv 
        `endif
44 3 maheshpalv 
 
45 
        `ifdef UART_peripheral
46 
        output uartRead, uartWrite;
47 
        `endif
48 
 
49 
        `ifdef SPI_peripheral
50 
        output sconEn, spiStatRead, spiBufRead, spiBufWrite, spiBufShift;
51 
        `endif
52 5 maheshpalv 
 
53 
        reg branch;
54 
        reg [`accMuxSelLen-1:0]  accMuxSel;
55 
        reg accEn;
56 
        reg [`op2MuxSelLen-1:0]  op2MuxSel;
57 6 maheshpalv 
        reg aluEn;
58 5 maheshpalv 
        reg [`aluOpcodeLen-1:0] aluOpcode;
59 
        reg bitRamEn, bitRamRw, byteRamEn, byteRamRw;
60 
        reg inputRead, outputRw;
61 
 
62 
        `ifdef timerAndCounter_peripheral
63 
        reg entypeEn, tcAccRead, tcResetEn, tcPresetEn, tcLoadEn;
64 
        `endif
65 
 
66 
        `ifdef UART_peripheral
67 
        reg uartRead, uartWrite;
68 
        `endif
69 3 maheshpalv 
 
70 5 maheshpalv 
        `ifdef SPI_peripheral
71 
        reg sconEn, spiStatRead, spiBufRead, spiBufWrite, spiBufShift;
72 
        `endif
73 
 
74 
        reg [`cuStateLen-1:0] state;
75 
 
76 
        // control unit FSM states:
77 
 
78 
        parameter       s               = `cuStateLen'b0;
79 
        parameter       sTc     = `cuStateLen'b1;
80 
        parameter       sBr     = `cuStateLen'b10;
81 
        parameter       sLd     = `cuStateLen'b11;
82 
        parameter       sSt     = `cuStateLen'b100;
83 
        parameter       sUart   = `cuStateLen'b101;
84 
        parameter       sSpi    = `cuStateLen'b110;
85 
        parameter       sAlu    = `cuStateLen'b111;
86 
 
87 
 
88 
 
89 
 
90 
        always @ (negedge clk)
91 
        begin
92 
 
93 
 
94 
                if (reset)
95 
                begin
96 
                        state = s;
97 
 
98 6 maheshpalv 
                        branch = 0;      accMuxSel = 0;   accEn = 0;       op2MuxSel = 0;   aluEn = 0; aluOpcode = 0; bitRamEn = 0;
99 5 maheshpalv 
                        bitRamRw = 1;   byteRamEn = 0;   byteRamRw = 1;  inputRead = 0;   outputRw = 1;
100 
 
101 
                        `ifdef timeAndCounter_peripheral
102 
                                entypeEn = 0;    tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
103 
                        `endif
104 
 
105 
                        `ifdef UART_peripheral
106 
                                uartRead = 0;    uartWrite = 0;
107 
                        `endif
108 
 
109 
                        `ifdef SPI_peripheral
110 
                                sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
111 
                        `endif
112 
                end
113 
 
114 
                else
115 
                begin
116 
 
117 
                        // execution unit control signals
118 
 
119 
                        case (state)
120 
 
121 
                        s               :               begin
122 
 
123 3 maheshpalv 
 
124 5 maheshpalv 
                                case (instOpCode)
125 
 
126 
                                `END                    :       begin
127 
 
128 
                                                state = sBr;
129 
 
130 
                                                branch = 1;                     // branch to some address . . .
131 
                                                accMuxSel = 0;
132 
                                                accEn = 0;
133 
                                                op2MuxSel = 0;
134 6 maheshpalv 
                                                aluEn = 0;
135 5 maheshpalv 
                                                aluOpcode = 0;
136 
                                                bitRamEn = 0;
137 
                                                bitRamRw = 1;
138 
                                                byteRamEn = 0;
139 
                                                byteRamRw = 1;
140 
                                                inputRead = 0;
141 
                                                outputRw = 1;
142 
 
143 
                                                `ifdef timeAndCounter_peripheral
144 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
145 
                                                `endif
146 
 
147 
                                                `ifdef UART_peripheral
148 
                                                        uartRead = 0;            uartWrite = 0;
149 
                                                `endif
150 
 
151 
                                                `ifdef SPI_peripheral
152 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0;
153 
                                                        spiBufShift = 0;
154 
                                                `endif
155 
 
156 
                                end     // end case END
157 3 maheshpalv 
 
158 
 
159 5 maheshpalv 
 
160 
                                `JMP                    :       begin
161 
 
162 
                                                state = sBr;
163 
 
164 6 maheshpalv 
                                                if (acc0)
165 
                                                        branch = 1;                     // branch to some address . . .
166 
                                                else
167 
                                                        branch = 0;
168 5 maheshpalv 
                                                accMuxSel = 0;
169 
                                                accEn = 0;
170 
                                                op2MuxSel = 0;
171 6 maheshpalv 
                                                aluEn = 0;
172 5 maheshpalv 
                                                aluOpcode = 0;
173 
                                                bitRamEn = 0;
174 
                                                bitRamRw = 1;
175 
                                                byteRamEn = 0;
176 
                                                byteRamRw = 1;
177 
                                                inputRead = 0;
178 
                                                outputRw = 1;
179 
 
180 
                                                `ifdef timeAndCounter_peripheral
181 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
182 
                                                `endif
183 
 
184 
                                                `ifdef UART_peripheral
185 
                                                        uartRead = 0;            uartWrite = 0;
186 
                                                `endif
187 
 
188 
                                                `ifdef SPI_peripheral
189 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
190 
                                                `endif
191 
 
192 
                                end     // end case JMP
193 
 
194 
 
195 
 
196 
                                `Ld                     :       begin
197 
                                // load thr. op2 MUX and alu.... enable acc in next cycle
198 
                                                state = sLd;
199 
 
200 
                                                branch = 0;
201 
                                                accMuxSel = 0;
202 
                                                accEn = 0;
203 
 
204 
                                                        case (iomemCode)
205 
                                                        2'b00   :       op2MuxSel = `op2MuxSelInput;
206 
                                                        2'b01   :       op2MuxSel = `op2MuxSelOutput;
207 
                                                        2'b10   :       op2MuxSel = `op2MuxSelBitRam;
208 
                                                        2'b11   :       op2MuxSel = `op2MuxSelByteRam;
209 
                                                        default:        op2MuxSel = `op2MuxSelInput;
210 
                                                        endcase
211 6 maheshpalv 
                                                        aluEn = 1;
212 5 maheshpalv 
                                                        aluOpcode = `LD_data;
213 
 
214 6 maheshpalv 
                                                bitRamEn = 1;
215 5 maheshpalv 
                                                bitRamRw = 1;
216 6 maheshpalv 
                                                byteRamEn = 1;
217 5 maheshpalv 
                                                byteRamRw = 1;
218 6 maheshpalv 
                                                inputRead = 1;
219 5 maheshpalv 
                                                outputRw = 1;
220 
 
221 
                                                `ifdef timeAndCounter_peripheral
222 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
223 
                                                `endif
224 
 
225 
                                                `ifdef UART_peripheral
226 
                                                        uartRead = 0;            uartWrite = 0;
227 
                                                `endif
228 
 
229 
                                                `ifdef SPI_peripheral
230 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
231 
                                                `endif
232 
 
233 
                                end     // end case Ld
234 
 
235 
 
236 
 
237 
 
238 
                                `Ldi                    :       begin
239 
                                                state = sAlu;
240 
 
241 
                                                branch = 0;
242 
                                                        accMuxSel = `accMuxSelImmData;  // select imm data thr mux
243 
                                                        accEn = 1;              // acc enabled
244 
                                                op2MuxSel = 0;
245 
                                                aluOpcode = 0;
246 6 maheshpalv 
                                                aluEn = 0;
247 5 maheshpalv 
                                                bitRamEn = 0;
248 
                                                bitRamRw = 1;
249 
                                                byteRamEn = 0;
250 
                                                byteRamRw = 1;
251 
                                                inputRead = 0;
252 
                                                outputRw = 1;
253 
 
254 
                                                `ifdef timeAndCounter_peripheral
255 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
256 
                                                `endif
257 
 
258 
                                                `ifdef UART_peripheral
259 
                                                        uartRead = 0;            uartWrite = 0;
260 
                                                `endif
261 
 
262 
                                                `ifdef SPI_peripheral
263 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
264 
                                                `endif
265 
 
266 
                                end             // end case Ldi
267 
 
268 
 
269 
 
270 
                                `ST                     :       begin
271 
                                                state = sSt;
272 
 
273 
                                                branch = 0;
274 
                                                accMuxSel = 0;
275 
                                                accEn = 0;
276 
                                                op2MuxSel = 0;
277 6 maheshpalv 
                                                aluEn = 0;
278 5 maheshpalv 
                                                aluOpcode = 0;
279 
                                                inputRead = 0;
280 
 
281 
                                                        case (iomemCode)
282 6 maheshpalv 
                                                        2'b01   :       begin   bitRamRw = 0;    byteRamRw = 1;  outputRw = 1; bitRamEn = 1;     byteRamEn = 1;  end
283 
                                                        2'b10   :       begin   bitRamRw = 1;   byteRamRw = 0;   outputRw = 1; bitRamEn = 1;     byteRamEn = 1;  end
284 5 maheshpalv 
                                                        2'b11   :       begin   bitRamRw = 1;   byteRamRw = 1;  outputRw = 0; end
285 
                                                        default:        begin   bitRamRw = 1;   byteRamRw = 1;  outputRw = 1;   end
286 
                                                        endcase
287 
 
288 
                                                `ifdef timeAndCounter_peripheral
289 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
290 
                                                `endif
291 
 
292 
                                                `ifdef UART_peripheral
293 
                                                        uartRead = 0;            uartWrite = 0;
294 
                                                `endif
295 
 
296 
                                                `ifdef SPI_peripheral
297 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
298 
                                                `endif
299 
 
300 
                                end
301 
 
302 
 
303 
 
304 
                                `ADD                    :       begin
305 
                                                state = sAlu;
306 
                                                aluOpcode = `ADD_alu;
307 6 maheshpalv 
                                                aluEn = 1;
308 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
309 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
310 
 
311 
                                                `ifdef timeAndCounter_peripheral
312 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
313 
                                                `endif
314 
 
315 
                                                `ifdef UART_peripheral
316 
                                                        uartRead = 0;            uartWrite = 0;
317 
                                                `endif
318 
 
319 
                                                `ifdef SPI_peripheral
320 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
321 
                                                `endif
322 
 
323 
                                end
324 
 
325 
 
326 
                                `SUB                    :       begin
327 
                                                state = sAlu;
328 
                                                aluOpcode = `SUB_alu;
329 6 maheshpalv 
                                                aluEn = 1;
330 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
331 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
332 
 
333 
                                                `ifdef timeAndCounter_peripheral
334 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
335 
                                                `endif
336 
 
337 
                                                `ifdef UART_peripheral
338 
                                                        uartRead = 0;            uartWrite = 0;
339 
                                                `endif
340 
 
341 
                                                `ifdef SPI_peripheral
342 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
343 
                                                `endif
344 
 
345 
                                end
346 
 
347 
                                // MUL & DIV are not implemented
348 
 
349 
 
350 
 
351 
                                `AND                    :       begin
352 
                                                state = sAlu;
353 
                                                aluOpcode = `AND_alu;
354 6 maheshpalv 
                                                aluEn = 1;
355 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
356 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
357 
 
358 
                                                `ifdef timeAndCounter_peripheral
359 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
360 
                                                `endif
361 
 
362 
                                                `ifdef UART_peripheral
363 
                                                        uartRead = 0;            uartWrite = 0;
364 
                                                `endif
365 
 
366 
                                                `ifdef SPI_peripheral
367 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
368 
                                                `endif
369 
 
370 
                                end
371 
 
372 
 
373 
 
374 
                                `OR                     :       begin
375 
                                                state = sAlu;
376 
                                                aluOpcode = `OR_alu;
377 6 maheshpalv 
                                                aluEn = 1;
378 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
379 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
380 
 
381 
                                                `ifdef timeAndCounter_peripheral
382 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
383 
                                                `endif
384 
 
385 
                                                `ifdef UART_peripheral
386 
                                                        uartRead = 0;            uartWrite = 0;
387 
                                                `endif
388 
 
389 
                                                `ifdef SPI_peripheral
390 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
391 
                                                `endif
392 
 
393 
                                end
394 
 
395 
 
396 
 
397 
                                `XOR                    :       begin
398 
                                                state = sAlu;
399 
                                                aluOpcode = `XOR_alu;
400 6 maheshpalv 
                                                aluEn = 1;
401 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
402 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
403 
 
404 
                                                `ifdef timeAndCounter_peripheral
405 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
406 
                                                `endif
407 
 
408 
                                                `ifdef UART_peripheral
409 
                                                        uartRead = 0;            uartWrite = 0;
410 
                                                `endif
411 
 
412 
                                                `ifdef SPI_peripheral
413 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
414 
                                                `endif
415 
 
416 
                                end
417 
 
418 
 
419 
 
420 
                                `GrT                    :       begin
421 
                                                state = sAlu;
422 
                                                aluOpcode = `GT_alu;
423 6 maheshpalv 
                                                aluEn = 1;
424 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
425 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
426 
 
427 
                                                `ifdef timeAndCounter_peripheral
428 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
429 
                                                `endif
430 
 
431 
                                                `ifdef UART_peripheral
432 
                                                        uartRead = 0;            uartWrite = 0;
433 
                                                `endif
434 
 
435 
                                                `ifdef SPI_peripheral
436 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
437 
                                                `endif
438 
 
439 
                                end
440 
 
441 
 
442 
 
443 
 
444 
 
445 
                                `GE                     :       begin
446 
                                                state = sAlu;
447 
                                                aluOpcode = `GE_alu;
448 6 maheshpalv 
                                                aluEn = 1;
449 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
450 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
451 
 
452 
                                                `ifdef timeAndCounter_peripheral
453 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
454 
                                                `endif
455 
 
456 
                                                `ifdef UART_peripheral
457 
                                                        uartRead = 0;            uartWrite = 0;
458 
                                                `endif
459 
 
460 
                                                `ifdef SPI_peripheral
461 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
462 
                                                `endif
463 
 
464 
                                end
465 
 
466 
 
467 
 
468 
 
469 
 
470 
                                `EQ                     :       begin
471 
                                                state = sAlu;
472 
                                                aluOpcode = `EQ_alu;
473 6 maheshpalv 
                                                aluEn = 1;
474 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
475 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
476 
 
477 
                                                `ifdef timeAndCounter_peripheral
478 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
479 
                                                `endif
480 
 
481 
                                                `ifdef UART_peripheral
482 
                                                        uartRead = 0;            uartWrite = 0;
483 
                                                `endif
484 
 
485 
                                                `ifdef SPI_peripheral
486 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
487 
                                                `endif
488 
 
489 
                                end
490 
 
491 
 
492 
 
493 
 
494 
 
495 
                                `LE                     :       begin
496 
                                                state = sAlu;
497 
                                                aluOpcode = `LE_alu;
498 6 maheshpalv 
                                                aluEn = 1;
499 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
500 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
501 
 
502 
                                                `ifdef timeAndCounter_peripheral
503 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
504 
                                                `endif
505 
 
506 
                                                `ifdef UART_peripheral
507 
                                                        uartRead = 0;            uartWrite = 0;
508 
                                                `endif
509 
 
510 
                                                `ifdef SPI_peripheral
511 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
512 
                                                `endif
513 
 
514 
                                end
515 
 
516 
 
517 
 
518 
 
519 
 
520 
                                `LT                     :       begin
521 
                                                state = sAlu;
522 
                                                aluOpcode = `LT_alu;
523 6 maheshpalv 
                                                aluEn = 1;
524 5 maheshpalv 
                                                branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
525 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
526 
 
527 
                                                `ifdef timeAndCounter_peripheral
528 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
529 
                                                `endif
530 
 
531 
                                                `ifdef UART_peripheral
532 
                                                        uartRead = 0;            uartWrite = 0;
533 
                                                `endif
534 
 
535 
                                                `ifdef SPI_peripheral
536 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
537 
                                                `endif
538 
 
539 
                                end
540 
 
541 
 
542 
                                `ifdef timeAndCounter_peripheral
543 
                                `PRE                    :       begin
544 
                                                state = sTc;
545 
 
546 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 1; tcLoadEn = 0;
547 
 
548 
 
549 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
550 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
551 
 
552 
 
553 
                                                `ifdef UART_peripheral
554 
                                                        uartRead = 0;            uartWrite = 0;
555 
                                                `endif
556 
 
557 
                                                `ifdef SPI_peripheral
558 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
559 
                                                `endif
560 
                                end
561 
                                `endif
562 
 
563 
 
564 
                                `ifdef timeAndCounter_peripheral
565 
                                `ETY                    :       begin
566 
                                                state = sTc;
567 
 
568 
                                                entypeEn = 1;           tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
569 
 
570 
 
571 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
572 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
573 
 
574 
 
575 
                                                `ifdef UART_peripheral
576 
                                                        uartRead = 0;            uartWrite = 0;
577 
                                                `endif
578 
 
579 
                                                `ifdef SPI_peripheral
580 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
581 
                                                `endif
582 
                                end
583 
                                `endif
584 
 
585 
 
586 
 
587 
                                `ifdef timeAndCounter_peripheral
588 
                                `RST                    :       begin
589 
                                                state = sTc;
590 
 
591 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 1;          tcPresetEn = 0;  tcLoadEn = 0;
592 
 
593 
 
594 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
595 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
596 
 
597 
 
598 
                                                `ifdef UART_peripheral
599 
                                                        uartRead = 0;            uartWrite = 0;
600 
                                                `endif
601 
 
602 
                                                `ifdef SPI_peripheral
603 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
604 
                                                `endif
605 
                                end
606 
                                `endif
607 
 
608 
 
609 
 
610 
                                `ifdef timeAndCounter_peripheral
611 
                                `LdTC                   :       begin
612 
                                                state = sTc;
613 
 
614 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 1;
615 
 
616 
                                                accMuxSel = `accMuxSelTcLoad;           accEn = 1;      // loading TC status data
617 
 
618 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;                      op2MuxSel = 0;
619 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
620 
 
621 
 
622 
                                                `ifdef UART_peripheral
623 
                                                        uartRead = 0;            uartWrite = 0;
624 
                                                `endif
625 
 
626 
                                                `ifdef SPI_peripheral
627 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
628 
                                                `endif
629 
                                end
630 
                                `endif
631 
 
632 
 
633 
 
634 
                                `ifdef timeAndCounter_peripheral
635 
                                `LdACC                  :       begin
636 
                                                state = sTc;
637 
 
638 
                                                entypeEn = 0;            tcAccRead = 1;  tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
639 
 
640 
                                                accMuxSel = `accMuxSelTcAcc;            accEn = 1;      // loading TC ACC data
641 
 
642 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              op2MuxSel = 0;
643 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
644 
 
645 
 
646 
                                                `ifdef UART_peripheral
647 
                                                        uartRead = 0;            uartWrite = 0;
648 
                                                `endif
649 
 
650 
                                                `ifdef SPI_peripheral
651 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
652 
                                                `endif
653 
                                end
654 
                                `endif
655 
 
656 
 
657 
 
658 
 
659 
                                `ifdef UART_peripheral
660 
                                `UARTrd                 :       begin
661 
                                                state = sUart;
662 
 
663 
                                                uartRead = 1;           uartWrite = 0;
664 
 
665 
                                                accMuxSel = `accMuxSelUart;             accEn = 1;      // loading UART data
666 
 
667 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;op2MuxSel = 0;
668 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
669 
 
670 
                                                `ifdef timerAndCounter_peripheral
671 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
672 
                                                `endif
673 
 
674 
 
675 
                                                `ifdef SPI_peripheral
676 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
677 
                                                `endif
678 
                                end
679 
                                `endif
680 
 
681 
 
682 
 
683 
 
684 
                                `ifdef UART_peripheral
685 
                                `UARTwr                 :       begin
686 
                                                state = sUart;
687 
 
688 
                                                uartRead = 0;            uartWrite = 1;
689 
 
690 6 maheshpalv 
                                                aluEn = 0;       aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
691 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
692 
 
693 
                                                `ifdef timerAndCounter_peripheral
694 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
695 
                                                `endif
696 
 
697 
 
698 
                                                `ifdef SPI_peripheral
699 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
700 
                                                `endif
701 
                                end
702 
                                `endif
703 
 
704 
 
705 
 
706 
 
707 
                                `ifdef SPI_peripheral
708 
                                `SPIxFER                        :       begin
709 
                                                state = sSpi;
710 
 
711 
                                                sconEn = 1;             spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
712 
 
713 
 
714 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
715 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
716 
 
717 
                                                `ifdef timerAndCounter_peripheral
718 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
719 
                                                `endif
720 
 
721 
                                                `ifdef UART_peripheral
722 
                                                uartRead = 0;            uartWrite = 0;
723 
                                                `endif
724 
 
725 
                                end
726 
                                `endif
727 
 
728 
 
729 
 
730 
                                `ifdef SPI_peripheral
731 
                                `SPIstat                        :       begin
732 
                                                state = sSpi;
733 
 
734 
                                                sconEn = 0;              spiStatRead = 1;        spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
735 
 
736 
 
737 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
738 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
739 
 
740 
                                                `ifdef timerAndCounter_peripheral
741 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
742 
                                                `endif
743 
 
744 
                                                `ifdef UART_peripheral
745 
                                                uartRead = 0;            uartWrite = 0;
746 
                                                `endif
747 
 
748 
                                end
749 
                                `endif
750 
 
751 
 
752 
 
753 
                                `ifdef SPI_peripheral
754 
                                `SPIwBUF                        :       begin
755 
                                                state = sSpi;
756 
 
757 
                                                sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 1;        spiBufShift = 0;
758 
 
759 
 
760 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
761 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
762 
 
763 
                                                `ifdef timerAndCounter_peripheral
764 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
765 
                                                `endif
766 
 
767 
                                                `ifdef UART_peripheral
768 
                                                uartRead = 0;            uartWrite = 0;
769 
                                                `endif
770 
 
771 
                                end
772 
                                `endif
773 
 
774 
 
775 
 
776 
                                `ifdef SPI_peripheral
777 
                                `SPIrBUF                        :       begin
778 
                                                state = sSpi;
779 
 
780 
                                                sconEn = 0;              spiStatRead = 0; spiBufRead = 1; spiBufWrite = 0; spiBufShift = 0;
781 
 
782 
 
783 6 maheshpalv 
                                                aluEn = 0;       aluOpcode = 0;           branch = 0;              accMuxSel = 0;           accEn = 0;       op2MuxSel = 0;
784 5 maheshpalv 
                                                bitRamEn = 0;    bitRamRw = 1;   byteRamEn = 0;           byteRamRw = 1;          inputRead = 0;           outputRw = 1;
785 
 
786 
                                                `ifdef timerAndCounter_peripheral
787 
                                                entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
788 
                                                `endif
789 
 
790 
                                                `ifdef UART_peripheral
791 
                                                uartRead = 0;            uartWrite = 0;
792 
                                                `endif
793 
 
794 
                                end
795 
                                `endif
796 
 
797 
                                default         :       begin
798 
 
799 
                                $write ("       unknown/unused instruction op-code encountered by control unit  ");
800 
                                $stop;
801 
                                end
802 
                                endcase // end  case (instOpCode)
803 
 
804 
 
805 
 
806 
                        end     // end case (s)
807 
 
808 
 
809 
                        sBr             :       begin
810 
                                                        branch = 0;
811 
                                                        state = s;
812 
                                                        end             // end case sBr
813 
 
814 
 
815 
                        sLd             :       begin
816 6 maheshpalv 
                                                        aluEn = 0;
817 
                                                        accEn = 1;
818 
                                                        accMuxSel = `accMuxSelAluOut;
819 5 maheshpalv 
                                                        state = s;
820 
                                                        end             // end case sLd
821 
 
822 
                        sSt             :       begin
823 
                                                        bitRamRw = 1;   byteRamRw = 1; outputRw = 1;
824 
                                                        state = s;
825 
                                                        end
826 
 
827 
                        sAlu            :       begin
828 6 maheshpalv 
                                                        aluEn = 0;
829 5 maheshpalv 
                                                        accEn = 1;
830 
                                                        accMuxSel = `accMuxSelAluOut;
831 
                                                        state = s;
832 
                                                        end
833 
 
834 
                        `ifdef timerAndCounter_peripheral
835 
                        sTc             :       begin
836 
                                                        entypeEn = 0;            tcAccRead = 0;   tcResetEn = 0;           tcPresetEn = 0;  tcLoadEn = 0;
837 
                                                        state = s;
838 
                                                        end
839 
                        `endif
840 
 
841 
                        `ifdef UART_peripheral
842 
                        sUart           :       begin
843 
                                                        uartRead = 0;            uartWrite = 0;
844 
                                                        state = s;
845 
                                                        end
846 
                        `endif
847 
 
848 
                        `ifdef SPI_peripheral
849 
                        sSpi            :       begin
850 
                                                        sconEn = 0;              spiStatRead = 0; spiBufRead = 0;  spiBufWrite = 0; spiBufShift = 0;
851 
                                                        state = s;
852 
                                                        end
853 
                        `endif
854 
 
855 
                        default         :       begin
856 
                        $write ("       control unit FSM in unknown state.      ");
857 
                        end
858 
                        endcase // end  case (state)
859 
                end     // end else part (outermost)
860 
 
861 
 
862 
 
863 
        end     // end always
864 
 
865 
 
866 3 maheshpalv 
endmodule

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