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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [defines.v] - Blame information for rev 6

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// 16-bit process controller defines
// 16-bit process controller defines
 
`define         immDataLen                      8
 
// program counter & instruction register
`define         instLen                         15                      // 15-bit fixed-length instructions
`define         instOpCodeLen           5
`define         instFieldLen            10
 
 
// control unit
`define         cuStateLen                      4               // max 16 states
`define         END                                     `instOpCodeLen'b0
`define         JMP                                     `instOpCodeLen'b1
`define         Ld                                              `instOpCodeLen'b10
`define         Ldi                                     `instOpCodeLen'b11
`define         ST                                              `instOpCodeLen'b100
`define         ADD                                     `instOpCodeLen'b101
`define         SUB                                     `instOpCodeLen'b110
`define         MUL                                     `instOpCodeLen'b111
`define         DIV                                     `instOpCodeLen'b1000
`define         AND                                     `instOpCodeLen'b1001
`define         OR                                              `instOpCodeLen'b1010
`define         XOR                                     `instOpCodeLen'b1011
`define         GrT                                     `instOpCodeLen'b1100
`define         GE                                              `instOpCodeLen'b1101
`define         EQ                                              `instOpCodeLen'b1110
`define         LE                                              `instOpCodeLen'b1111
`define         LT                                              `instOpCodeLen'b10000
`define         PRE                                     `instOpCodeLen'b10001
`define         ETY                                     `instOpCodeLen'b10010
`define         RST                                     `instOpCodeLen'b10011
`define         LdTC                                    `instOpCodeLen'b10100
`define         LdACC                                   `instOpCodeLen'b10101
`define         UARTrd                          `instOpCodeLen'b10110
`define         UARTwr                          `instOpCodeLen'b10111
`define         SPIxFER                         `instOpCodeLen'b11000
`define         SPIstat                         `instOpCodeLen'b11001
`define         SPIwBUF                         `instOpCodeLen'b11010
`define         SPIrBUF                         `instOpCodeLen'b11011
 
// alu opcodes
`define         aluOpcodeLen            4
`define         AND_alu                         `aluOpcodeLen'b0
`define         OR_alu                          `aluOpcodeLen'b1
`define         XOR_alu                         `aluOpcodeLen'b10
`define         GT_alu                          `aluOpcodeLen'b11
`define         GE_alu                          `aluOpcodeLen'b100
`define         EQ_alu                          `aluOpcodeLen'b101
`define         LE_alu                          `aluOpcodeLen'b110
`define         LT_alu                          `aluOpcodeLen'b111
`define         ADD_alu                         `aluOpcodeLen'b1000
`define         SUB_alu                         `aluOpcodeLen'b1001
`define         MUL_alu                         `aluOpcodeLen'b1010
`define         DIV_alu                         `aluOpcodeLen'b1011
`define         LD_data                         `aluOpcodeLen'b1100
 
// bit RAM
`define         bitRamAddrLen           7               // 7-bit address
`define         bitRamDepth                     128     // 2^7 = 128 locations
 
// byte RAM
`define         byteRamLen                      8               // 8-bit input
`define         byteRamAddrLen          7               // 7-bit address
`define         byteRamDepth            128     // 2^7 = 128 locations
 
// input register
`define         inputNumber                     128     // 128 inputs
`define         inputAddrLen            7               // 7-bit address
 
// output register
`define         outputNumber            128     // 128 outputs
`define         outputAddrLen           7               // 7-bit address
 
// accumulator multiplexer
`define         accMuxSelLen                    4               // 2^4 = 16 selections available for accumulator
`define         accMuxSelImmData                `accMuxSelLen'b0
`define         accMuxSelAluOut         `accMuxSelLen'b1
`define         accMuxSelTcLoad         `accMuxSelLen'b10
`define         accMuxSelTcAcc                  `accMuxSelLen'b11
`define         accMuxSelUart                   `accMuxSelLen'b100
`define         accMuxSelSpiStat                `accMuxSelLen'b101
`define         accMuxSelSpiBuf         `accMuxSelLen'b110
 
// operand2 multiplexer
`define         op2MuxSelLen                    4               // 2^4 = 16 selections available for op2
`define         op2MuxSelInput                  `op2MuxSelLen'b0
`define         op2MuxSelOutput         `op2MuxSelLen'b1
`define         op2MuxSelBitRam         `op2MuxSelLen'b10
`define         op2MuxSelByteRam                `op2MuxSelLen'b11
`define         op2MuxSel4                      `op2MuxSelLen'b100
`define         op2MuxSel5                      `op2MuxSelLen'b101
`define         op2MuxSel6                      `op2MuxSelLen'b110
 
//-----------------------------------------------------------------------------------------------------
 
// peripheral defines
`define         timerAndCounter_peripheral
`define         UART_peripheral
`define         SPI_peripheral
 
 
//-----------------------------------------------------------------------------------------------------
 
// Timer-Counter
`define         tcAccLen                                8               // 8-bit accumulated value
`define         tcPresetLen                     8               // 8-bit preset value
`define         tcAddrLen                       4
`define         tcTypeLen                       2               // max 4-types
`define         tcNumbers                       16              // total 16 modules (8-timers, 8-counters)
 
`define         timerType1                      `tcTypeLen'b0
`define         timerType2                      `tcTypeLen'b1
`define         timerType3                      `tcTypeLen'b10
 
`define         counterType1            `tcTypeLen'b1
`define         counterType2            `tcTypeLen'b10
 
 
//-----------------------------------------------------------------------------------------------------
 
// UART
`define         dataBits                        8
`define         sbTick                          16      // ticks for stop bits (16 for 1-stopBit)
`define         fifoWidth                       4
`define                 number_fifo_regs        16
`define                 fifoCntrWidth           5
`define                 fifoDepth                       16

Line No.	Rev	Author	Line
1	3	maheshpalv	`// 16-bit process controller defines`
2	5	maheshpalv	`// 16-bit process controller defines`
3	3	maheshpalv
4			`define immDataLen 8
5
6			`// program counter & instruction register`
7			`define instLen 15 // 15-bit fixed-length instructions
8			`define instOpCodeLen 5
9			`define instFieldLen 10
10
11	5	maheshpalv
12			`// control unit`
13			`define cuStateLen 4 // max 16 states
14			`define END `instOpCodeLen'b0
15			`define JMP `instOpCodeLen'b1
16			`define Ld `instOpCodeLen'b10
17			`define Ldi `instOpCodeLen'b11
18			`define ST `instOpCodeLen'b100
19			`define ADD `instOpCodeLen'b101
20			`define SUB `instOpCodeLen'b110
21			`define MUL `instOpCodeLen'b111
22			`define DIV `instOpCodeLen'b1000
23			`define AND `instOpCodeLen'b1001
24			`define OR `instOpCodeLen'b1010
25			`define XOR `instOpCodeLen'b1011
26			`define GrT `instOpCodeLen'b1100
27			`define GE `instOpCodeLen'b1101
28			`define EQ `instOpCodeLen'b1110
29			`define LE `instOpCodeLen'b1111
30			`define LT `instOpCodeLen'b10000
31			`define PRE `instOpCodeLen'b10001
32			`define ETY `instOpCodeLen'b10010
33			`define RST `instOpCodeLen'b10011
34			`define LdTC `instOpCodeLen'b10100
35			`define LdACC `instOpCodeLen'b10101
36			`define UARTrd `instOpCodeLen'b10110
37			`define UARTwr `instOpCodeLen'b10111
38			`define SPIxFER `instOpCodeLen'b11000
39			`define SPIstat `instOpCodeLen'b11001
40			`define SPIwBUF `instOpCodeLen'b11010
41			`define SPIrBUF `instOpCodeLen'b11011
42
43	3	maheshpalv	`// alu opcodes`
44			`define aluOpcodeLen 4
45			`define AND_alu `aluOpcodeLen'b0
46			`define OR_alu `aluOpcodeLen'b1
47			`define XOR_alu `aluOpcodeLen'b10
48			`define GT_alu `aluOpcodeLen'b11
49			`define GE_alu `aluOpcodeLen'b100
50			`define EQ_alu `aluOpcodeLen'b101
51			`define LE_alu `aluOpcodeLen'b110
52			`define LT_alu `aluOpcodeLen'b111
53			`define ADD_alu `aluOpcodeLen'b1000
54			`define SUB_alu `aluOpcodeLen'b1001
55			`define MUL_alu `aluOpcodeLen'b1010
56			`define DIV_alu `aluOpcodeLen'b1011
57	5	maheshpalv	`define LD_data `aluOpcodeLen'b1100
58	3	maheshpalv
59			`// bit RAM`
60			`define bitRamAddrLen 7 // 7-bit address
61			`define bitRamDepth 128 // 2^7 = 128 locations
62
63			`// byte RAM`
64			`define byteRamLen 8 // 8-bit input
65			`define byteRamAddrLen 7 // 7-bit address
66			`define byteRamDepth 128 // 2^7 = 128 locations
67
68			`// input register`
69			`define inputNumber 128 // 128 inputs
70			`define inputAddrLen 7 // 7-bit address
71
72			`// output register`
73			`define outputNumber 128 // 128 outputs
74			`define outputAddrLen 7 // 7-bit address
75
76			`// accumulator multiplexer`
77	5	maheshpalv	`define accMuxSelLen 4 // 2^4 = 16 selections available for accumulator
78			`define accMuxSelImmData `accMuxSelLen'b0
79			`define accMuxSelAluOut `accMuxSelLen'b1
80			`define accMuxSelTcLoad `accMuxSelLen'b10
81			`define accMuxSelTcAcc `accMuxSelLen'b11
82			`define accMuxSelUart `accMuxSelLen'b100
83			`define accMuxSelSpiStat `accMuxSelLen'b101
84			`define accMuxSelSpiBuf `accMuxSelLen'b110
85	3	maheshpalv
86			`// operand2 multiplexer`
87	5	maheshpalv	`define op2MuxSelLen 4 // 2^4 = 16 selections available for op2
88			`define op2MuxSelInput `op2MuxSelLen'b0
89			`define op2MuxSelOutput `op2MuxSelLen'b1
90			`define op2MuxSelBitRam `op2MuxSelLen'b10
91			`define op2MuxSelByteRam `op2MuxSelLen'b11
92	3	maheshpalv	`define op2MuxSel4 `op2MuxSelLen'b100
93			`define op2MuxSel5 `op2MuxSelLen'b101
94			`define op2MuxSel6 `op2MuxSelLen'b110
95
96			`//-----------------------------------------------------------------------------------------------------`
97
98			`// peripheral defines`
99			`define timerAndCounter_peripheral
100			`define UART_peripheral
101	6	maheshpalv	`define SPI_peripheral
102	3	maheshpalv
103
104			`//-----------------------------------------------------------------------------------------------------`
105
106			`// Timer-Counter`
107			`define tcAccLen 8 // 8-bit accumulated value
108			`define tcPresetLen 8 // 8-bit preset value
109			`define tcAddrLen 4
110			`define tcTypeLen 2 // max 4-types
111			`define tcNumbers 16 // total 16 modules (8-timers, 8-counters)
112
113			`define timerType1 `tcTypeLen'b0
114			`define timerType2 `tcTypeLen'b1
115			`define timerType3 `tcTypeLen'b10
116
117			`define counterType1 `tcTypeLen'b1
118			`define counterType2 `tcTypeLen'b10
119
120
121			`//-----------------------------------------------------------------------------------------------------`
122
123			`// UART`
124			`define dataBits 8
125			`define sbTick 16 // ticks for stop bits (16 for 1-stopBit)
126			`define fifoWidth 4
127			`define number_fifo_regs 16
128			`define fifoCntrWidth 5
129			`define fifoDepth 16

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Subversion Repositories instruction_list_pipelined_processor_with_peripherals

[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [defines.v] - Blame information for rev 6