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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [defines.v] - Blame information for rev 8

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// 8-bit Pipelined Processor defines
 
`define         immDataLen                      8
 
// program counter & instruction register
`define         instAddrLen                     10                      // 10-bit address => 1024 inst in rom
`define         instLen                         15                      // 15-bit fixed-length instructions
`define         instOpCodeLen           5
`define         instFieldLen            10
 
 
// control unit
`define         cuStateLen                      4               // max 16 states
`define         END                                     `instOpCodeLen'b0
`define         JMP                                     `instOpCodeLen'b1
`define         Ld                                              `instOpCodeLen'b10
`define         Ldi                                     `instOpCodeLen'b11
`define         ST                                              `instOpCodeLen'b100
`define         ADD                                     `instOpCodeLen'b101
`define         SUB                                     `instOpCodeLen'b110
`define         MUL                                     `instOpCodeLen'b111
`define         DIV                                     `instOpCodeLen'b1000
`define         AND                                     `instOpCodeLen'b1001
`define         OR                                              `instOpCodeLen'b1010
`define         XOR                                     `instOpCodeLen'b1011
`define         GrT                                     `instOpCodeLen'b1100
`define         GE                                              `instOpCodeLen'b1101
`define         EQ                                              `instOpCodeLen'b1110
`define         LE                                              `instOpCodeLen'b1111
`define         LT                                              `instOpCodeLen'b10000
`define         PRE                                     `instOpCodeLen'b10001
`define         ETY                                     `instOpCodeLen'b10010
`define         RST                                     `instOpCodeLen'b10011
`define         LdTC                                    `instOpCodeLen'b10100
`define         LdACC                                   `instOpCodeLen'b10101
`define         UARTrd                          `instOpCodeLen'b10110
`define         UARTwr                          `instOpCodeLen'b10111
`define         UARTstat                                `instOpCodeLen'b11000
`define         SPIxFER                         `instOpCodeLen'b11001
`define         SPIstat                         `instOpCodeLen'b11010
`define         SPIwBUF                         `instOpCodeLen'b11011
`define         SPIrBUF                         `instOpCodeLen'b11100
 
// alu opcodes
`define         aluOpcodeLen            4
`define         AND_alu                         `aluOpcodeLen'b0
`define         OR_alu                          `aluOpcodeLen'b1
`define         XOR_alu                         `aluOpcodeLen'b10
`define         GT_alu                          `aluOpcodeLen'b11
`define         GE_alu                          `aluOpcodeLen'b100
`define         EQ_alu                          `aluOpcodeLen'b101
`define         LE_alu                          `aluOpcodeLen'b110
`define         LT_alu                          `aluOpcodeLen'b111
`define         ADD_alu                         `aluOpcodeLen'b1000
`define         SUB_alu                         `aluOpcodeLen'b1001
`define         MUL_alu                         `aluOpcodeLen'b1010
`define         DIV_alu                         `aluOpcodeLen'b1011
`define         LD_data                         `aluOpcodeLen'b1100
 
// bit RAM
`define         bitRamAddrLen           7               // 7-bit address
`define         bitRamDepth                     128     // 2^7 = 128 locations
 
// byte RAM
`define         byteRamLen                      8               // 8-bit input
`define         byteRamAddrLen          7               // 7-bit address
`define         byteRamDepth            128     // 2^7 = 128 locations
 
// input register
`define         inputNumber                     128     // 128 inputs
`define         inputAddrLen            7               // 7-bit address
 
// output register
`define         outputNumber            128     // 128 outputs
`define         outputAddrLen           7               // 7-bit address
 
// accumulator multiplexer
`define         accMuxSelLen                    4               // 2^4 = 16 selections available for accumulator
`define         accMuxSelImmData                `accMuxSelLen'b0
`define         accMuxSelAluOut         `accMuxSelLen'b1
`define         accMuxSelTcLoad         `accMuxSelLen'b10
`define         accMuxSelTcAcc                  `accMuxSelLen'b11
`define         accMuxSelUartData               `accMuxSelLen'b100
`define         accMuxSelUartStat               `accMuxSelLen'b101
`define         accMuxSelSpiStat                `accMuxSelLen'b110
`define         accMuxSelSpiBuf         `accMuxSelLen'b111
 
// operand2 multiplexer
`define         op2MuxSelLen                    4               // 2^4 = 16 selections available for op2
`define         op2MuxSelInput                  `op2MuxSelLen'b0
`define         op2MuxSelOutput         `op2MuxSelLen'b1
`define         op2MuxSelBitRam         `op2MuxSelLen'b10
`define         op2MuxSelByteRam                `op2MuxSelLen'b11
`define         op2MuxSel4                      `op2MuxSelLen'b100
`define         op2MuxSel5                      `op2MuxSelLen'b101
`define         op2MuxSel6                      `op2MuxSelLen'b110
 
//-----------------------------------------------------------------------------------------------------
 
// peripheral defines
`define         timerAndCounter_peripheral
`define         UART_peripheral
`define         SPI_peripheral
 
 
//-----------------------------------------------------------------------------------------------------
 
// Timer-Counter
`define         tcAccLen                                8               // 8-bit accumulated value
`define         tcPresetLen                     8               // 8-bit preset value
`define         tcAddrLen                       4
`define         tcTypeLen                       2               // max 4-types
`define         tcNumbers                       8               // total 8 modules (4-timers, 4-counters)
 
`define         timerType1                      `tcTypeLen'b0
`define         timerType2                      `tcTypeLen'b1
`define         timerType3                      `tcTypeLen'b10
 
`define         counterType1            `tcTypeLen'b1
`define         counterType2            `tcTypeLen'b10
 
 
//-----------------------------------------------------------------------------------------------------
 
// UART
`define         dataBits                        8
`define         sbTick                          16      // ticks for stop bits (16 for 1-stopBit)
`define         fifoWidth                       4
`define                 number_fifo_regs        16
`define                 fifoCntrWidth           5
`define                 fifoDepth                       16

Line No.	Rev	Author	Line
1	3	maheshpalv
2	8	maheshpalv	`// 8-bit Pipelined Processor defines`
3
4	3	maheshpalv	`define immDataLen 8
5
6			`// program counter & instruction register`
7	7	maheshpalv	`define instAddrLen 10 // 10-bit address => 1024 inst in rom
8	3	maheshpalv	`define instLen 15 // 15-bit fixed-length instructions
9			`define instOpCodeLen 5
10			`define instFieldLen 10
11
12	5	maheshpalv
13			`// control unit`
14			`define cuStateLen 4 // max 16 states
15			`define END `instOpCodeLen'b0
16			`define JMP `instOpCodeLen'b1
17			`define Ld `instOpCodeLen'b10
18			`define Ldi `instOpCodeLen'b11
19			`define ST `instOpCodeLen'b100
20			`define ADD `instOpCodeLen'b101
21			`define SUB `instOpCodeLen'b110
22			`define MUL `instOpCodeLen'b111
23			`define DIV `instOpCodeLen'b1000
24			`define AND `instOpCodeLen'b1001
25			`define OR `instOpCodeLen'b1010
26			`define XOR `instOpCodeLen'b1011
27			`define GrT `instOpCodeLen'b1100
28			`define GE `instOpCodeLen'b1101
29			`define EQ `instOpCodeLen'b1110
30			`define LE `instOpCodeLen'b1111
31			`define LT `instOpCodeLen'b10000
32			`define PRE `instOpCodeLen'b10001
33			`define ETY `instOpCodeLen'b10010
34			`define RST `instOpCodeLen'b10011
35			`define LdTC `instOpCodeLen'b10100
36			`define LdACC `instOpCodeLen'b10101
37			`define UARTrd `instOpCodeLen'b10110
38			`define UARTwr `instOpCodeLen'b10111
39	7	maheshpalv	`define UARTstat `instOpCodeLen'b11000
40			`define SPIxFER `instOpCodeLen'b11001
41			`define SPIstat `instOpCodeLen'b11010
42			`define SPIwBUF `instOpCodeLen'b11011
43			`define SPIrBUF `instOpCodeLen'b11100
44	5	maheshpalv
45	3	maheshpalv	`// alu opcodes`
46			`define aluOpcodeLen 4
47			`define AND_alu `aluOpcodeLen'b0
48			`define OR_alu `aluOpcodeLen'b1
49			`define XOR_alu `aluOpcodeLen'b10
50			`define GT_alu `aluOpcodeLen'b11
51			`define GE_alu `aluOpcodeLen'b100
52			`define EQ_alu `aluOpcodeLen'b101
53			`define LE_alu `aluOpcodeLen'b110
54			`define LT_alu `aluOpcodeLen'b111
55			`define ADD_alu `aluOpcodeLen'b1000
56			`define SUB_alu `aluOpcodeLen'b1001
57			`define MUL_alu `aluOpcodeLen'b1010
58			`define DIV_alu `aluOpcodeLen'b1011
59	5	maheshpalv	`define LD_data `aluOpcodeLen'b1100
60	3	maheshpalv
61			`// bit RAM`
62			`define bitRamAddrLen 7 // 7-bit address
63			`define bitRamDepth 128 // 2^7 = 128 locations
64
65			`// byte RAM`
66			`define byteRamLen 8 // 8-bit input
67			`define byteRamAddrLen 7 // 7-bit address
68			`define byteRamDepth 128 // 2^7 = 128 locations
69
70			`// input register`
71			`define inputNumber 128 // 128 inputs
72			`define inputAddrLen 7 // 7-bit address
73
74			`// output register`
75			`define outputNumber 128 // 128 outputs
76			`define outputAddrLen 7 // 7-bit address
77
78			`// accumulator multiplexer`
79	5	maheshpalv	`define accMuxSelLen 4 // 2^4 = 16 selections available for accumulator
80			`define accMuxSelImmData `accMuxSelLen'b0
81			`define accMuxSelAluOut `accMuxSelLen'b1
82			`define accMuxSelTcLoad `accMuxSelLen'b10
83			`define accMuxSelTcAcc `accMuxSelLen'b11
84	7	maheshpalv	`define accMuxSelUartData `accMuxSelLen'b100
85			`define accMuxSelUartStat `accMuxSelLen'b101
86			`define accMuxSelSpiStat `accMuxSelLen'b110
87			`define accMuxSelSpiBuf `accMuxSelLen'b111
88	3	maheshpalv
89			`// operand2 multiplexer`
90	5	maheshpalv	`define op2MuxSelLen 4 // 2^4 = 16 selections available for op2
91			`define op2MuxSelInput `op2MuxSelLen'b0
92			`define op2MuxSelOutput `op2MuxSelLen'b1
93			`define op2MuxSelBitRam `op2MuxSelLen'b10
94			`define op2MuxSelByteRam `op2MuxSelLen'b11
95	3	maheshpalv	`define op2MuxSel4 `op2MuxSelLen'b100
96			`define op2MuxSel5 `op2MuxSelLen'b101
97			`define op2MuxSel6 `op2MuxSelLen'b110
98
99			`//-----------------------------------------------------------------------------------------------------`
100
101			`// peripheral defines`
102			`define timerAndCounter_peripheral
103			`define UART_peripheral
104	6	maheshpalv	`define SPI_peripheral
105	3	maheshpalv
106
107			`//-----------------------------------------------------------------------------------------------------`
108
109			`// Timer-Counter`
110			`define tcAccLen 8 // 8-bit accumulated value
111			`define tcPresetLen 8 // 8-bit preset value
112			`define tcAddrLen 4
113			`define tcTypeLen 2 // max 4-types
114	7	maheshpalv	`define tcNumbers 8 // total 8 modules (4-timers, 4-counters)
115	3	maheshpalv
116			`define timerType1 `tcTypeLen'b0
117			`define timerType2 `tcTypeLen'b1
118			`define timerType3 `tcTypeLen'b10
119
120			`define counterType1 `tcTypeLen'b1
121			`define counterType2 `tcTypeLen'b10
122
123
124			`//-----------------------------------------------------------------------------------------------------`
125
126			`// UART`
127			`define dataBits 8
128			`define sbTick 16 // ticks for stop bits (16 for 1-stopBit)
129			`define fifoWidth 4
130			`define number_fifo_regs 16
131			`define fifoCntrWidth 5
132			`define fifoDepth 16

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Subversion Repositories instruction_list_pipelined_processor_with_peripherals

[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [defines.v] - Blame information for rev 8