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Subversion Repositories instruction_list_pipelined_processor_with_peripherals

[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [pgmCounter.v] - Blame information for rev 7

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`include "timescale.v"
`include "defines.v"
 
 
module pgmCounter (clk, reset, branch, pcIn, pcOut);
 
        input clk, reset, branch;
        input [`instAddrLen-1:0] pcIn;
 
        output [`instAddrLen-1:0] pcOut;
 
        reg [`instAddrLen-1:0] pc = `instAddrLen'b0;
 
        always @ (posedge clk or posedge reset)
        begin
 
                if (reset)
                begin
                        pc = `instAddrLen'b0;
                        $write ("       program counter module is reset. Starting at address 00h        ");
                end
 
                else
                begin
 
                        if(branch)
                        begin
                                pc = pcIn;
                                $write ("       branching at address %h", pcIn);
                        end
                        else
                        begin
                                pc = pc + 1'b1;
                        end
                end
        end     // end always
 
 
        assign pcOut = pc;
 
 
endmodule

Line No.	Rev	Author	Line
1	3	maheshpalv
2			`include "timescale.v"
3			`include "defines.v"
4
5
6			`module pgmCounter (clk, reset, branch, pcIn, pcOut);`
7
8			`input clk, reset, branch;`
9	7	maheshpalv	input [`instAddrLen-1:0] pcIn;
10	3	maheshpalv
11	7	maheshpalv	output [`instAddrLen-1:0] pcOut;
12	3	maheshpalv
13	7	maheshpalv	reg [`instAddrLen-1:0] pc = `instAddrLen'b0;
14	3	maheshpalv
15			`always @ (posedge clk or posedge reset)`
16			`begin`
17
18			`if (reset)`
19			`begin`
20	7	maheshpalv	pc = `instAddrLen'b0;
21	3	maheshpalv	`$write (" program counter module is reset. Starting at address 00h ");`
22			`end`
23
24			`else`
25			`begin`
26
27			`if(branch)`
28			`begin`
29			`pc = pcIn;`
30			`$write (" branching at address %h", pcIn);`
31			`end`
32			`else`
33			`begin`
34			`pc = pc + 1'b1;`
35			`end`
36			`end`
37			`end // end always`
38
39
40			`assign pcOut = pc;`
41
42
43			`endmodule`

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[/] [instruction_list_pipelined_processor_with_peripherals/] [trunk/] [hdl/] [pgmCounter.v] - Blame information for rev 7