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[/] [ion/] [trunk/] [src/] [memtest/] [flash.s] - Blame information for rev 185

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################################################################################
# flash.s -- Chunk of code and data to be written to simulated FLASH
# and executed from there as part of program memtest.
#-------------------------------------------------------------------------------
# This program tests the external 8-bit static memory interface (FLASH) in
# simulation.
#
# The program assumes there's no useable r/w memory other than the XRAM so it
# does not use any memory for variables or stack.
#-------------------------------------------------------------------------------
#
################################################################################
 
    #---- Test parameters
    .ifndef FLASH_BASE
    .set FLASH_BASE,    0xb0000000          # 1st FLASH address
    .endif
    .ifndef XRAM_BASE
    .set XRAM_BASE,     0x00000000          # 1st XRAM address
    .endif
 
 
    #---- Set to >0 to enable a few debug messages
    .set DEBUG,         0
 
    #---- Cache parameters
    .set ICACHE_NUM_LINES, 256              # no. of lines in the I-Cache
    .set DCACHE_NUM_LINES, 256              # no. of lines in the D-Cache
    .set DCACHE_LINE_SIZE, 4                # D-Cache line size in words
 
 
    #---- UART stuff
    .set UART_BASE,     0x20000000          # UART base address
    .set UART_TX,       0x0000              # TX reg offset
    .set UART_STATUS,   0x0020              # status reg offset
 
    #---------------------------------------------------------------------------
 
    .text
    .align  2
    .global flash_test
    .ent flash_test
flash_test:
    .set    noreorder
 
    #---- Print 'running from flash' message
    la      $a0,msg0
    jal     puts
    nop
 
    sw      $a1,0($a0)
    sw      $a2,4($a0)
    sw      $a3,8($a0)
 
 
 
    #---- D-Cache back-to-back loads and stores
    la      $a0,msg3
    jal     puts
    nop
 
    li      $a0,XRAM_BASE+4
    ori     $t8,$zero,16
 
rw_test_loop:
    li      $s0,0x10001010
 
    addu    $s1,$s0,$s0
    addu    $s2,$s1,$s1
    addu    $s3,$s2,$s2
    or      $s4,$zero,$s0
    or      $s5,$zero,$s1
    or      $s6,$zero,$s2
    or      $s7,$zero,$s3
 
    sw      $s0,0($a0)
    sw      $s1,4($a0)
    sw      $s2,8($a0)
    sw      $s3,12($a0)
    sw      $s4,16($a0)
    sw      $s5,20($a0)
    sw      $s6,24($a0)
    sw      $s7,28($a0)
 
    lw      $t0,0($a0)
    lw      $t1,4($a0)
    lw      $t2,8($a0)
    lw      $t3,12($a0)
    lw      $t4,16($a0)
    lw      $t5,20($a0)
    lw      $t6,24($a0)
    lw      $t7,28($a0)
 
    bne     $s0,$t0,rw_mismatch
    nop
    bne     $s1,$t1,rw_mismatch
    nop
    bne     $s2,$t2,rw_mismatch
    nop
    bne     $s3,$t3,rw_mismatch
    nop
    bne     $s4,$t4,rw_mismatch
    nop
    bne     $s5,$t5,rw_mismatch
    nop
    bne     $s6,$t6,rw_mismatch
    nop
    bne     $s7,$t7,rw_mismatch
    nop
    .ifgt 0
    andi    $s0,$s0,0xffff
    andi    $s1,$s1,0xff
    andi    $s2,$s2,0xffff
    andi    $s3,$s3,0xff
    andi    $s4,$s4,0xff
    andi    $s5,$s5,0xff
    andi    $s6,$s6,0xff
    andi    $s7,$s7,0xff
 
    sh      $s0,2($a0)
    sb      $s1,3($a0)
    sh      $s2,4($a0)
    sb      $s3,5($a0)
    sb      $s4,2($a0)
    sb      $s5,3($a0)
    sb      $s6,4($a0)
    sb      $s7,5($a0)
    sh      $s0,2($a0)
    sh      $s2,4($a0)
    sh      $s2,6($a0)
    sh      $s0,10($a0)
 
    lh      $t0,2($a0)
    lb      $t1,3($a0)
    lh      $t2,4($a0)
    lb      $t3,5($a0)
    lb      $t4,2($a0)
    lb      $t5,3($a0)
    lb      $t6,4($a0)
    lb      $t7,5($a0)
    lh      $t0,2($a0)
    lh      $t2,4($a0)
    lh      $t2,6($a0)
    lh      $t0,10($a0)
 
    bne     $s0,$t0,rw_mismatch
    nop
    bne     $s1,$t1,rw_mismatch
    nop
    bne     $s2,$t2,rw_mismatch
    nop
    bne     $s3,$t3,rw_mismatch
    nop
    bne     $s4,$t4,rw_mismatch
    nop
    bne     $s5,$t5,rw_mismatch
    nop
    bne     $s6,$t6,rw_mismatch
    nop
    bne     $s7,$t7,rw_mismatch
    nop
    .endif
    addi    $t8,$t8,-1
    bnez    $t8,rw_test_loop
    addiu   $a0,$a0,0x100
 
    la      $a0,msg_ok
    jal     puts
    nop
 
    j       rw_done
    nop
 
rw_mismatch:
    la      $a0,msg_fail
    jal     puts
    nop
 
rw_done:
    la      $a0,crlf
    jal     puts
    nop
 
 
test_xram:
    la      $a0,msg1
    jal     puts
    nop
 
    li      $t0,XRAM_BASE
    li      $t1,256
    li      $t2,0x12345678
 
xram_fill_loop:
    sw      $t2,0($t0)
    addi    $t0,$t0,4
    addi    $t2,$t2,0x0333
    bgtz    $t1,xram_fill_loop
    addi    $t1,$t1,-1
 
    li      $t0,XRAM_BASE
    li      $t1,256
    li      $t2,0x12345678
    li      $t3,0x12345678
 
xram_test_loop:
    lw      $t3,0($t0)
    bne     $t2,$t3,xram_test_failed
    addi    $t0,$t0,4
    addi    $t2,$t2,0x0333
    bgtz    $t1,xram_test_loop
    addi    $t1,$t1,-1
 
    la      $a0,msg_ok
    jal     puts
    nop
    j       xram_test_end
    nop
 
xram_test_failed:
    la      $a0,msg_fail
    jal     puts
    nop
 
xram_test_end:
    la      $a0,crlf
    jal     puts
    nop
 
 
    la      $a0,msg2
    jal     puts
    nop
 
$DONE:
    j       $DONE               # freeze here
    nop
 
 
#--- Special functions that do not use any RAM ---------------------------------
# WARNING: Not for general use!
# All parameters in $a0..$a4, stack unused. No attempt to comply with any ABI
# has been made.
# Since we can't use any RAM, registers have been used with no regard for
# intended usage -- have to share reg bank with calling function.
 
# void puts(char *s) -- print zero-terminated string
puts:
    la      $a2,UART_BASE       # UART base address
puts_loop:
    lb      $v0,0($a0)
    beqz    $v0,puts_end
    addiu   $a0,1
puts_wait_tx_rdy:
    lw      $v1,UART_STATUS($a2)
    andi    $v1,$v1,0x02
    beqz    $v1,puts_wait_tx_rdy
    nop
    sw      $v0,UART_TX($a2)
    b       puts_loop
    nop
 
puts_end:
    jr      $ra
    nop
 
# void put_hex(int n, int d) -- print integer as d-digit hex
put_hex:
    la      $a2,UART_BASE
    la      $a3,put_hex_table
    addi    $a1,-1
    add     $a1,$a1,$a1
    add     $a1,$a1,$a1
 
put_hex_loop:
    srlv    $v0,$a0,$a1
    andi    $v0,$v0,0x0f
    addu    $s2,$a3,$v0
    lb      $v0,0($s2)
put_hex_wait_tx_rdy:
    lw      $v1,UART_STATUS($a2)
    andi    $v1,$v1,0x02
    beqz    $v1,put_hex_wait_tx_rdy
    nop
    sw      $v0,UART_TX($a2)
 
    bnez    $a1,put_hex_loop
    addi    $a1,-4
 
    jr      $ra
    nop
 
 
#---- Constant data (note we keep it in the text section) ----------------------
 
put_hex_table:
    .ascii  "0123456789abcdef"
 
msg1:
    .asciz "Testing 16-bit static R/W... "
msg2:
    .asciz "End of test, program frozen.\n\r"
msg3:
    .asciz "Testing bursts of back-to-back R/W... "
msg_ok:
    .asciz "OK"
msg_fail:
    .asciz "FAIL"
crlf:
    .asciz "\n\r"
space:
    .asciz "  "
msg0:
    .asciz "\n\rNow running from 8-bit static memory.\n\r"
 
    .set    reorder
    .end    flash_test
 

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[/] [ion/] [trunk/] [src/] [memtest/] [flash.s] - Blame information for rev 185

Line No.	Rev	Author	Line
1	185	ja_rd	`################################################################################`
2			`# flash.s -- Chunk of code and data to be written to simulated FLASH`
3			`# and executed from there as part of program memtest.`
4			`#-------------------------------------------------------------------------------`
5			`# This program tests the external 8-bit static memory interface (FLASH) in`
6			`# simulation.`
7			`#`
8			`# The program assumes there's no useable r/w memory other than the XRAM so it`
9			`# does not use any memory for variables or stack.`
10			`#-------------------------------------------------------------------------------`
11			`#`
12			`################################################################################`
13
14			`#---- Test parameters`
15			`.ifndef FLASH_BASE`
16			`.set FLASH_BASE, 0xb0000000 # 1st FLASH address`
17			`.endif`
18			`.ifndef XRAM_BASE`
19			`.set XRAM_BASE, 0x00000000 # 1st XRAM address`
20			`.endif`
21
22
23			`#---- Set to >0 to enable a few debug messages`
24			`.set DEBUG, 0`
25
26			`#---- Cache parameters`
27			`.set ICACHE_NUM_LINES, 256 # no. of lines in the I-Cache`
28			`.set DCACHE_NUM_LINES, 256 # no. of lines in the D-Cache`
29			`.set DCACHE_LINE_SIZE, 4 # D-Cache line size in words`
30
31
32			`#---- UART stuff`
33			`.set UART_BASE, 0x20000000 # UART base address`
34			`.set UART_TX, 0x0000 # TX reg offset`
35			`.set UART_STATUS, 0x0020 # status reg offset`
36
37			`#---------------------------------------------------------------------------`
38
39			`.text`
40			`.align 2`
41			`.global flash_test`
42			`.ent flash_test`
43			`flash_test:`
44			`.set noreorder`
45
46			`#---- Print 'running from flash' message`
47			`la $a0,msg0`
48			`jal puts`
49			`nop`
50
51			`sw $a1,0($a0)`
52			`sw $a2,4($a0)`
53			`sw $a3,8($a0)`
54
55
56
57			`#---- D-Cache back-to-back loads and stores`
58			`la $a0,msg3`
59			`jal puts`
60			`nop`
61
62			`li $a0,XRAM_BASE+4`
63			`ori $t8,$zero,16`
64
65			`rw_test_loop:`
66			`li $s0,0x10001010`
67
68			`addu $s1,$s0,$s0`
69			`addu $s2,$s1,$s1`
70			`addu $s3,$s2,$s2`
71			`or $s4,$zero,$s0`
72			`or $s5,$zero,$s1`
73			`or $s6,$zero,$s2`
74			`or $s7,$zero,$s3`
75
76			`sw $s0,0($a0)`
77			`sw $s1,4($a0)`
78			`sw $s2,8($a0)`
79			`sw $s3,12($a0)`
80			`sw $s4,16($a0)`
81			`sw $s5,20($a0)`
82			`sw $s6,24($a0)`
83			`sw $s7,28($a0)`
84
85			`lw $t0,0($a0)`
86			`lw $t1,4($a0)`
87			`lw $t2,8($a0)`
88			`lw $t3,12($a0)`
89			`lw $t4,16($a0)`
90			`lw $t5,20($a0)`
91			`lw $t6,24($a0)`
92			`lw $t7,28($a0)`
93
94			`bne $s0,$t0,rw_mismatch`
95			`nop`
96			`bne $s1,$t1,rw_mismatch`
97			`nop`
98			`bne $s2,$t2,rw_mismatch`
99			`nop`
100			`bne $s3,$t3,rw_mismatch`
101			`nop`
102			`bne $s4,$t4,rw_mismatch`
103			`nop`
104			`bne $s5,$t5,rw_mismatch`
105			`nop`
106			`bne $s6,$t6,rw_mismatch`
107			`nop`
108			`bne $s7,$t7,rw_mismatch`
109			`nop`
110			`.ifgt 0`
111			`andi $s0,$s0,0xffff`
112			`andi $s1,$s1,0xff`
113			`andi $s2,$s2,0xffff`
114			`andi $s3,$s3,0xff`
115			`andi $s4,$s4,0xff`
116			`andi $s5,$s5,0xff`
117			`andi $s6,$s6,0xff`
118			`andi $s7,$s7,0xff`
119
120			`sh $s0,2($a0)`
121			`sb $s1,3($a0)`
122			`sh $s2,4($a0)`
123			`sb $s3,5($a0)`
124			`sb $s4,2($a0)`
125			`sb $s5,3($a0)`
126			`sb $s6,4($a0)`
127			`sb $s7,5($a0)`
128			`sh $s0,2($a0)`
129			`sh $s2,4($a0)`
130			`sh $s2,6($a0)`
131			`sh $s0,10($a0)`
132
133			`lh $t0,2($a0)`
134			`lb $t1,3($a0)`
135			`lh $t2,4($a0)`
136			`lb $t3,5($a0)`
137			`lb $t4,2($a0)`
138			`lb $t5,3($a0)`
139			`lb $t6,4($a0)`
140			`lb $t7,5($a0)`
141			`lh $t0,2($a0)`
142			`lh $t2,4($a0)`
143			`lh $t2,6($a0)`
144			`lh $t0,10($a0)`
145
146			`bne $s0,$t0,rw_mismatch`
147			`nop`
148			`bne $s1,$t1,rw_mismatch`
149			`nop`
150			`bne $s2,$t2,rw_mismatch`
151			`nop`
152			`bne $s3,$t3,rw_mismatch`
153			`nop`
154			`bne $s4,$t4,rw_mismatch`
155			`nop`
156			`bne $s5,$t5,rw_mismatch`
157			`nop`
158			`bne $s6,$t6,rw_mismatch`
159			`nop`
160			`bne $s7,$t7,rw_mismatch`
161			`nop`
162			`.endif`
163			`addi $t8,$t8,-1`
164			`bnez $t8,rw_test_loop`
165			`addiu $a0,$a0,0x100`
166
167			`la $a0,msg_ok`
168			`jal puts`
169			`nop`
170
171			`j rw_done`
172			`nop`
173
174			`rw_mismatch:`
175			`la $a0,msg_fail`
176			`jal puts`
177			`nop`
178
179			`rw_done:`
180			`la $a0,crlf`
181			`jal puts`
182			`nop`
183
184
185			`test_xram:`
186			`la $a0,msg1`
187			`jal puts`
188			`nop`
189
190			`li $t0,XRAM_BASE`
191			`li $t1,256`
192			`li $t2,0x12345678`
193
194			`xram_fill_loop:`
195			`sw $t2,0($t0)`
196			`addi $t0,$t0,4`
197			`addi $t2,$t2,0x0333`
198			`bgtz $t1,xram_fill_loop`
199			`addi $t1,$t1,-1`
200
201			`li $t0,XRAM_BASE`
202			`li $t1,256`
203			`li $t2,0x12345678`
204			`li $t3,0x12345678`
205
206			`xram_test_loop:`
207			`lw $t3,0($t0)`
208			`bne $t2,$t3,xram_test_failed`
209			`addi $t0,$t0,4`
210			`addi $t2,$t2,0x0333`
211			`bgtz $t1,xram_test_loop`
212			`addi $t1,$t1,-1`
213
214			`la $a0,msg_ok`
215			`jal puts`
216			`nop`
217			`j xram_test_end`
218			`nop`
219
220			`xram_test_failed:`
221			`la $a0,msg_fail`
222			`jal puts`
223			`nop`
224
225			`xram_test_end:`
226			`la $a0,crlf`
227			`jal puts`
228			`nop`
229
230
231			`la $a0,msg2`
232			`jal puts`
233			`nop`
234
235			`$DONE:`
236			`j $DONE # freeze here`
237			`nop`
238
239
240			`#--- Special functions that do not use any RAM ---------------------------------`
241			`# WARNING: Not for general use!`
242			`# All parameters in $a0..$a4, stack unused. No attempt to comply with any ABI`
243			`# has been made.`
244			`# Since we can't use any RAM, registers have been used with no regard for`
245			`# intended usage -- have to share reg bank with calling function.`
246
247			`# void puts(char *s) -- print zero-terminated string`
248			`puts:`
249			`la $a2,UART_BASE # UART base address`
250			`puts_loop:`
251			`lb $v0,0($a0)`
252			`beqz $v0,puts_end`
253			`addiu $a0,1`
254			`puts_wait_tx_rdy:`
255			`lw $v1,UART_STATUS($a2)`
256			`andi $v1,$v1,0x02`
257			`beqz $v1,puts_wait_tx_rdy`
258			`nop`
259			`sw $v0,UART_TX($a2)`
260			`b puts_loop`
261			`nop`
262
263			`puts_end:`
264			`jr $ra`
265			`nop`
266
267			`# void put_hex(int n, int d) -- print integer as d-digit hex`
268			`put_hex:`
269			`la $a2,UART_BASE`
270			`la $a3,put_hex_table`
271			`addi $a1,-1`
272			`add $a1,$a1,$a1`
273			`add $a1,$a1,$a1`
274
275			`put_hex_loop:`
276			`srlv $v0,$a0,$a1`
277			`andi $v0,$v0,0x0f`
278			`addu $s2,$a3,$v0`
279			`lb $v0,0($s2)`
280			`put_hex_wait_tx_rdy:`
281			`lw $v1,UART_STATUS($a2)`
282			`andi $v1,$v1,0x02`
283			`beqz $v1,put_hex_wait_tx_rdy`
284			`nop`
285			`sw $v0,UART_TX($a2)`
286
287			`bnez $a1,put_hex_loop`
288			`addi $a1,-4`
289
290			`jr $ra`
291			`nop`
292
293
294			`#---- Constant data (note we keep it in the text section) ----------------------`
295
296			`put_hex_table:`
297			`.ascii "0123456789abcdef"`
298
299			`msg1:`
300			`.asciz "Testing 16-bit static R/W... "`
301			`msg2:`
302			`.asciz "End of test, program frozen.\n\r"`
303			`msg3:`
304			`.asciz "Testing bursts of back-to-back R/W... "`
305			`msg_ok:`
306			`.asciz "OK"`
307			`msg_fail:`
308			`.asciz "FAIL"`
309			`crlf:`
310			`.asciz "\n\r"`
311			`space:`
312			`.asciz " "`
313			`msg0:`
314			`.asciz "\n\rNow running from 8-bit static memory.\n\r"`
315
316			`.set reorder`
317			`.end flash_test`
318