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[/] [ion/] [trunk/] [src/] [memtest/] [makefile] - Blame information for rev 213

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#-- Bring toolchain config parameters from the common makefile -----------------
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include ../common/makefile
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# We'll run the simulation for long enough to complete the test
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SIM_LENGTH = 400000
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# FPGA Block RAM parameters
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BRAM_START = 0xbfc00000
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CODE_BRAM_SIZE = 2048
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FLASH_START = 0xb0000000
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# External RAM parameters (size in words)
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XRAM_SIZE = 1024
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XRAM_START = 0x00000000
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# Set to > 0 to initialize and enable the cache before running the tests
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TEST_CACHE = 1
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LFLAGS = -Ttext $(BRAM_START) -Tdata $(XRAM_START) -eentry -I elf32-big
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LFLAGS_FLASH = -Ttext $(FLASH_START) -eflash_test -I elf32-big
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OBJS = memtest.o
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#-- Configuration --------------------------------------------------------------
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# Set to !=0 to test execution from flash
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# (Set to 0 if running on real HW on which you have no initialized FLASH)
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EXEC_FLASH = 1
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#-- Targets & rules ------------------------------------------------------------
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#-- Main target -- build code for BRAM and FLASH
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memtest:  memtest.code memtest.data flash.bin
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        -@# This comment prevents triggering the default rule. Instead, make will
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        -@# invoke our rules for the dependencies.
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#-- Targets for main code to be run from BRAM
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memtest.o: memtest.s
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        $(AS) -defsym TEST_CACHE=$(TEST_CACHE) -defsym EXEC_FLASH=$(EXEC_FLASH) \
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    -defsym XRAM_BASE=$(XRAM_START) -o memtest.o memtest.s
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memtest.axf: memtest.o
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        $(LD) $(LFLAGS) -Map memtest.map -s -N -o memtest.axf memtest.o
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        -@$(DUMP) -I elf32-big --disassemble memtest.axf > memtest.lst
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# Dump code and data to separate binaries (data binary will be empty but
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# TB2 needs it anyway)
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memtest.code: memtest.axf
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        $(COPY) -I elf32-big -j .text -j .rodata -O binary memtest.axf memtest.code
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memtest.data: memtest.axf
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        $(COPY) -I elf32-big -j .sbss -j .data -j .bss -O binary memtest.axf memtest.data
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#-- Targets for code to be run from FLASH
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flash.o: flash.s
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        $(AS) -defsym TEST_CACHE=$(TEST_CACHE) -defsym FLASH_BASE=$(FLASH_START) -o flash.o flash.s
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flash.axf: flash.o
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        $(LD) $(LFLAGS_FLASH) -Map flash.map -s -N -o flash.axf flash.o
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        -@$(DUMP) -I elf32-big --disassemble flash.axf > flash.lst
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flash.bin: flash.axf
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        $(COPY) -I elf32-big -j .text -j .rodata -O binary flash.axf flash.bin
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#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
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# Create VHDL file for simulation test bench using TB2 template
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sim: memtest demo
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        $(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xbfc00000 \
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                --flash flash.bin --flash_size 4096 \
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                --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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                -s $(SIM_LENGTH) -v $(SRC_DIR)\\mips_tb2_template.vhdl \
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                -o $(TB_DIR)\\mips_tb2.vhdl -e mips_tb2
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        $(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xbfc00000 \
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                --flash flash.bin --flash_size 4096 \
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                --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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                -s $(SIM_LENGTH) -v $(SRC_DIR)/sim_params_template.vhdl \
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                -o $(TB_DIR)/sim_params_pkg.vhdl -e mips_tb2
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# Create VHDL file for hardware demo
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demo: memtest
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        $(TO_VHDL) --code memtest.code --data memtest.data --log_trigger=0xb0000000 \
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        --code_size $(CODE_BRAM_SIZE) --data_size $(XRAM_SIZE) \
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        -v $(SRC_DIR)/code_rom_template.vhdl  -n "Memory test" \
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        -o $(DEMO_DIR)/code_rom_pkg.vhdl
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#-- And now the usual housekeeping stuff ---------------------------------------
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.PHONY: clean
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clean:
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        -$(RM) *.o *.obj *.map *.lst *.hex *.exe *.axf *.code *.data *.bin

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