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#-- Bring toolchain config parameters from the common makefile -----------------
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include ../common/makefile
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50 |
ja_rd |
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# We'll run the simulation for long enough to complete the test
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SIM_LENGTH = 400000
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66 |
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# FPGA Block RAM parameters (size in words)
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BRAM_START = 0xbfc00000
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CODE_BRAM_SIZE = 2048
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# Simulated FLASH parameters (size in bytes)
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FLASH_START = 0xb0000000
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FLASH_SIZE = 4096
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# External RAM parameters (size in 16-bit halfwords)
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# This is the RAM size simulated by slite; set the same value so the execution
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# logs match.
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XRAM_SIZE = 2048
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XRAM_START = 0x00000000
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# Set to > 0 to initialize and enable the cache before running the tests
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TEST_CACHE = 1
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50 |
ja_rd |
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66 |
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LFLAGS = -Ttext $(BRAM_START) -Tdata $(XRAM_START) -eentry -I elf32-big
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LFLAGS_FLASH = -Ttext $(FLASH_START) -eflash_test -I elf32-big
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50 |
ja_rd |
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185 |
ja_rd |
OBJS = memtest.o
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109 |
ja_rd |
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185 |
ja_rd |
#-- Configuration --------------------------------------------------------------
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50 |
ja_rd |
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185 |
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# Set to !=0 to test execution from flash
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# (Set to 0 if running on real HW on which you have no initialized FLASH)
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EXEC_FLASH = 1
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50 |
ja_rd |
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185 |
ja_rd |
#-- Targets & rules ------------------------------------------------------------
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50 |
ja_rd |
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185 |
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#-- Main target -- build code for BRAM and FLASH
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memtest: memtest.code memtest.data flash.bin
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-@# This comment prevents triggering the default rule. Instead, make will
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-@# invoke our rules for the dependencies.
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#-- Targets for main code to be run from BRAM
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memtest.o: memtest.s
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213 |
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$(AS) -defsym TEST_CACHE=$(TEST_CACHE) -defsym EXEC_FLASH=$(EXEC_FLASH) \
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185 |
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-defsym XRAM_BASE=$(XRAM_START) -o memtest.o memtest.s
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memtest.axf: memtest.o
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$(LD) $(LFLAGS) -Map memtest.map -s -N -o memtest.axf memtest.o
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-@$(DUMP) -I elf32-big --disassemble memtest.axf > memtest.lst
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# Dump code and data to separate binaries (data binary will be empty but
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# TB2 needs it anyway)
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memtest.code: memtest.axf
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$(COPY) -I elf32-big -j .text -j .rodata -O binary memtest.axf memtest.code
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memtest.data: memtest.axf
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$(COPY) -I elf32-big -j .sbss -j .data -j .bss -O binary memtest.axf memtest.data
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#-- Targets for code to be run from FLASH
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flash.o: flash.s
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213 |
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$(AS) -defsym TEST_CACHE=$(TEST_CACHE) -defsym FLASH_BASE=$(FLASH_START) -o flash.o flash.s
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185 |
ja_rd |
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flash.axf: flash.o
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$(LD) $(LFLAGS_FLASH) -Map flash.map -s -N -o flash.axf flash.o
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-@$(DUMP) -I elf32-big --disassemble flash.axf > flash.lst
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| 66 |
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flash.bin: flash.axf
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$(COPY) -I elf32-big -j .text -j .rodata -O binary flash.axf flash.bin
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| 69 |
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| 70 |
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#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
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| 73 |
229 |
ja_rd |
#-- Create VHDL package with data and parameters for simulation
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193 |
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sim: memtest demo
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229 |
ja_rd |
$(VHDL_OBJ_PKG) --project="Memtest" \
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--package sim_params_pkg \
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--bin memtest.code --name obj_code --bram_size $(CODE_BRAM_SIZE) \
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--bin memtest.data --name sram_init --xram_size $(XRAM_SIZE) \
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--bin flash.bin --name prom_init --flash_size $(FLASH_SIZE) \
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--output $(TB_DIR)/sim_params_pkg.vhdl \
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-s $(SIM_LENGTH) --log_trigger=0xbfc00000 \
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| 82 |
50 |
ja_rd |
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| 83 |
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| 84 |
229 |
ja_rd |
#-- Create VHDL package with data and parameters for syntesis
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| 85 |
185 |
ja_rd |
demo: memtest
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| 86 |
229 |
ja_rd |
$(VHDL_OBJ_PKG) --project="Memtest" \
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| 87 |
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--package obj_code_pkg \
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| 88 |
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--bin memtest.code --name obj_code --bram_size $(CODE_BRAM_SIZE) \
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| 89 |
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--output $(DEMO_DIR)/../SoC/bootstrap_code_pkg.vhdl
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| 90 |
185 |
ja_rd |
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| 91 |
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| 92 |
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#-- And now the usual housekeeping stuff ---------------------------------------
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.PHONY: clean
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| 95 |
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| 96 |
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clean:
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-$(RM) *.o *.obj *.map *.lst *.hex *.exe *.axf *.code *.data *.bin
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