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[/] [ion/] [trunk/] [src/] [opcodes/] [opcodes.s] - Blame information for rev 245

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Line No.	Rev	Author	Line
1	2	ja_rd	`################################################################################`
2	4	ja_rd	`# opcode.s -- MIPS opcode tester for Ion project`
3	2	ja_rd	`#-------------------------------------------------------------------------------`
4			`# ORIGINAL AUTHOR: Steve Rhoads (rhoadss@yahoo.com) -- 1/10/01`
5			`#`
6			`# This file is an edited version of 'opcodes.asm', which is part of the Plasma`
7			`# project (http://opencores.org/project,plasma).`
8			`# COPYRIGHT: Software placed into the public domain by the original author.`
9			`# Software 'as is' without warranty. Author liable for nothing.`
10	4	ja_rd	`#`
11	2	ja_rd	`#-------------------------------------------------------------------------------`
12	4	ja_rd	`# This assembly file tests all of the opcodes supported by the Ion core.`
13	2	ja_rd	`# This test assumes that address 0x20000000 is the UART write register.`
14			`# Successful tests will print out "A" or "AB" or "ABC" or ....`
15			`# Missing letters or letters out of order indicate a failure.`
16	14	ja_rd	`#`
17	2	ja_rd	`#-------------------------------------------------------------------------------`
18	4	ja_rd	`# NOTE: This test bench relies on the simulation logs to catch errors. That is,`
19	38	ja_rd	`# unlike the original Plasma code, this one does not check the test success`
20			`# conditions. Instead, it performs the operations to be tested and relies on you`
21	4	ja_rd	`# to compare the logs from the logic simulation and the software simulation.`
22			`# Test that work this way have been commented with this tag: "@log"`
23			`#`
24	2	ja_rd	`#-------------------------------------------------------------------------------`
25	203	ja_rd	`# @note1: Hardware interrupt simulation`
26	2	ja_rd	`#`
27	203	ja_rd	`# Hardware interrupts can be triggered by writing to a bank of debug`
28			`# registers; you can trigger any or all of the 6 hardware interrupts of the`
29			`# R3000 architecture (i.e. excluding the 2 SW interrupts), with any delay you`
30			`# want, measured in instruction cycles, NOT clock cycles. You can make two or`
31			`# more IRQs assert at the same time for test purposes.`
32			`# Both the software simulator and the VHDL simulation test bench implement`
33			`# these debug registers.`
34			`# Note again that the delay is given in instruction cycles.`
35	2	ja_rd	`################################################################################`
36
37	4	ja_rd	`#-- Set flags below to >0 to enable/disable test assembly ------------------`
38	2	ja_rd
39	4	ja_rd	`.set TEST_UNALIGNED_LOADS, 0 # unaligned loads`
40			`.set TEST_UNALIGNED_STORES, 0 # unaligned stores`
41			`.set TEST_BREAK, 1 # BREAK instruction`
42			`# WARNING: the assembler expands div instructions, see 'as' manual`
43	14	ja_rd	`.set TEST_DIV, 1 # DIV* instructions`
44			`.set TEST_MUL, 1 # MUL* instructions`
45	203	ja_rd	`.set TEST_BAD_OPCODES, 1 # Test opcode emulation trap`
46			`.set TEST_TRAP_DELAY_EMU, 0 # Test emu of bad opcodes in delay slots`
47			`.set TEST_HW_INTS, 1 # Test HW interrupts (@note1)`
48
49	148	ja_rd	`.set USE_CACHE, 1 # Initialize and enable cache`
50
51			`.set ICACHE_NUM_LINES, 256 # no. of lines in the I-Cache`
52			`.set DCACHE_NUM_LINES, 256 # no. of lines in the D-Cache`
53			`.set DCACHE_LINE_SIZE, 4 # D-Cache line size in words`
54	2	ja_rd
55	4	ja_rd	`#---------------------------------------------------------------------------`
56
57	2	ja_rd	`.text`
58			`.align 2`
59			`.globl entry`
60			`.ent entry`
61			`entry:`
62			`.set noreorder`
63
64			`la $gp, _gp #initialize stack pointer`
65			`la $4, __bss_start #$4 = .sbss_start`
66			`la $5, _end #$5 = .bss_end`
67			`nop #no stack needed`
68			`nop`
69
70			`b StartTest`
71			`nop`
72
73	29	ja_rd
74			`# Trap handler address`
75	66	ja_rd	`#.org 0x3c`
76			`.org 0x0180`
77
78	29	ja_rd	`# We have three trap sources: syscall, break and unimplemented opcode`
79			`# Plus we have to account for a faulty cause code; that's 4 causes`
80			`# Besides, we have to look out for the branch delay flag (BD)`
81			`# We'll just increment $4 by a fixed constant depending on the cause`
82			`# so we will not save any registers (there's no stack anyway)`
83			`InterruptVector:`
84			`mfc0 $k0,$13 # Get trap cause code`
85	152	ja_rd	`srl $k0,$k0,2`
86	29	ja_rd	`andi $k0,$k0,0x01f`
87			`ori $k1,$zero,0x8 # was it a syscall?`
88			`beq $k0,$k1,trap_syscall`
89			`addi $k1,$k1,0x1 # was it a break?`
90			`beq $k0,$k1,trap_break`
91			`addi $k1,$k1,0x1 # was it a bad opcode?`
92			`bne $k0,$k1,trap_invalid`
93	2	ja_rd	`nop`
94	29	ja_rd
95			`# Unimplemented instruction`
96			`trap_unimplemented:`
97	203	ja_rd	`.ifgt TEST_BAD_OPCODES`
98	165	ja_rd	`# jump to mips32 opcode emulator with c0_cause in $k0`
99			`j opcode_emu`
100			`nop`
101			`.else`
102			`# just do some simple arith so the opcode tester knows we were here`
103	29	ja_rd	`j trap_return`
104			`add $4,$4,4`
105	165	ja_rd	`.endif`
106	2	ja_rd
107	29	ja_rd	`# Break instruction`
108			`trap_break:`
109			`j trap_return`
110	2	ja_rd	`add $4,$4,5`
111	29	ja_rd
112			`# Syscall instruction`
113			`trap_syscall:`
114	165	ja_rd	`mfc0 $k0,$12 # test behavior of rfe: invert bit IE of SR...`
115			`xori $k0,0x01`
116			`mtc0 $k0,$12 # ...and see (in the @log) if rfe recovers it`
117			`j trap_return`
118	29	ja_rd	`add $4,$4,6`
119
120			`# Invalid trap cause code, most likely hardware bug`
121			`trap_invalid:`
122			`j trap_return`
123			`add $4,$4,0xf`
124
125			`trap_return:`
126			`mfc0 $k1,$14 # C0_EPC=14 (Exception PC)`
127			`mfc0 $k0,$13 # Get bit 31 (BD) from C0 cause register`
128			`srl $k0,31`
129			`andi $k0,$k0,1`
130			`bnez $k0,trap_return_delay_slot`
131			`addi $k1,$k1,4 # skip trap instruction`
132			`jr $k1`
133			`nop`
134			`trap_return_delay_slot:`
135			`addi $k1,$k1,4 # skip jump instruction too`
136			`jr $k1 # (we just added 8 to epc)`
137	165	ja_rd	`rfe`
138	29	ja_rd
139
140	2	ja_rd	`StartTest:`
141	148	ja_rd	`.ifgt USE_CACHE`
142			`jal setup_cache`
143			`nop`
144			`.else`
145	165	ja_rd	`ori $k0,$zero,0x1`
146			`mtc0 $k0,$12 # disable interrupts and cache, stay in kernel`
147	148	ja_rd	`.endif`
148	152	ja_rd
149	165	ja_rd	`li $k0,0x00020000 # enter user mode...`
150			`mtc0 $k0,$12 # ...NOW`
151			`mfc0 $k0,$12 # verify COP* in user mode triggers trap (@log)`
152	152	ja_rd	`ori $k0,0x01`
153			`mtc0 $k0,$12 # verify COP* in user mode triggers trap (@log)`
154	165	ja_rd	`# The two above COP0s should trigger a trap. The 1st one tests the delay in`
155			`# entering user mode.`
156	152	ja_rd
157	165	ja_rd	`# The rest of the tests proceed in user mode (not that there's much`
158			`# difference...)`
159
160	2	ja_rd	`lui $20,0x2000 # serial port write address`
161			`ori $21,$0,'\n' # <CR> character`
162			`ori $22,$0,'X' # 'X' letter`
163			`ori $23,$0,'\r'`
164			`ori $24,$0,0x0f80 # temp memory`
165
166	165	ja_rd	`sb $23,0($20) # Write a message to console`
167	2	ja_rd	`sb $21,0($20)`
168			`sb $23,0($20)`
169			`sb $21,0($20)`
170			`sb $23,0($20)`
171			`sb $21,0($20)`
172			`sb $23,0($20)`
173			`sb $21,0($20)`
174	29	ja_rd
175	165	ja_rd
176	2	ja_rd	`######################################`
177			`#Arithmetic Instructions`
178			`######################################`
179			`ArthmeticTest:`
180			`ori $2,$0,'A'`
181			`sb $2,0($20)`
182			`ori $2,$0,'r'`
183			`sb $2,0($20)`
184			`ori $2,$0,'i'`
185			`sb $2,0($20)`
186			`ori $2,$0,'t'`
187			`sb $2,0($20)`
188			`ori $2,$0,'h'`
189			`sb $2,0($20)`
190			`sb $23,0($20)`
191			`sb $21,0($20)`
192
193			`#a: ADD`
194			`ori $2,$0,'a'`
195			`sb $2,0($20)`
196			`ori $3,$0,5`
197			`ori $4,$0,60`
198			`add $2,$3,$4`
199			`sb $2,0($20) #A`
200			`sb $23,0($20)`
201			`sb $21,0($20)`
202
203			`#b: ADDI`
204			`ori $2,$0,'b'`
205			`sb $2,0($20)`
206			`ori $4,$0,60`
207			`addi $2,$4,5`
208			`sb $2,0($20) #A`
209			`sb $23,0($20)`
210			`sb $21,0($20)`
211
212			`#c: ADDIU`
213			`ori $2,$0,'c'`
214			`sb $2,0($20)`
215			`ori $4,$0,50`
216			`addiu $5,$4,15`
217			`sb $5,0($20) #A`
218			`sb $23,0($20)`
219			`sb $21,0($20)`
220
221			`#d: ADDU`
222			`ori $2,$0,'d'`
223			`sb $2,0($20)`
224			`ori $3,$0,5`
225			`ori $4,$0,60`
226			`add $2,$3,$4`
227			`sb $2,0($20) #A`
228			`sb $23,0($20)`
229			`sb $21,0($20)`
230
231	4	ja_rd	`# DIV tests, skip conditionally`
232			`.ifgt TEST_DIV`
233	2	ja_rd
234			`#e: DIV`
235			`ori $2,$0,'e'`
236			`sb $2,0($20)`
237			`ori $2,$0,65*117+41`
238			`ori $3,$0,117`
239			`div $2,$3`
240			`nop`
241			`mflo $4`
242			`sb $4,0($20) #A`
243			`mfhi $4`
244			`addi $4,$4,66-41`
245			`sb $4,0($20) #B`
246			`li $2,-67*19`
247			`ori $3,$0,19`
248			`div $2,$3`
249			`nop`
250			`mflo $4`
251			`sub $4,$0,$4`
252			`sb $4,0($20) #C`
253			`ori $2,$0,68*23`
254			`li $3,-23`
255			`div $2,$3`
256			`nop`
257			`mflo $4`
258			`sub $4,$0,$4`
259			`sb $4,0($20) #D`
260			`li $2,-69*13`
261			`li $3,-13`
262			`div $2,$3`
263			`mflo $4`
264			`sb $4,0($20) #E`
265			`sb $23,0($20)`
266			`sb $21,0($20)`
267
268			`#f: DIVU`
269			`ori $2,$0,'f'`
270			`sb $2,0($20)`
271			`ori $2,$0,65*13`
272			`ori $3,$0,13`
273			`divu $2,$3`
274			`nop`
275			`mflo $4`
276			`sb $4,0($20) #A`
277			`sb $23,0($20)`
278			`sb $21,0($20)`
279	4	ja_rd	`.endif`
280	2	ja_rd
281	4	ja_rd	`# MUL tests, skip conditionally`
282			`.ifgt TEST_MUL`
283	2	ja_rd
284			`#g: MULT`
285			`ori $2,$0,'g'`
286			`sb $2,0($20)`
287			`ori $2,$0,5`
288			`ori $3,$0,13`
289			`mult $2,$3`
290			`nop`
291			`mflo $4`
292			`sb $4,0($20) #A`
293			`li $2,-5`
294			`ori $3,$0,13`
295			`mult $2,$3`
296			`mfhi $5`
297			`mflo $4`
298			`sub $4,$0,$4`
299			`addu $4,$4,$5`
300			`addi $4,$4,2`
301			`sb $4,0($20) #B`
302			`ori $2,$0,5`
303			`li $3,-13`
304			`mult $2,$3`
305			`mfhi $5`
306			`mflo $4`
307			`sub $4,$0,$4`
308			`addu $4,$4,$5`
309			`addi $4,$4,3`
310			`sb $4,0($20) #C`
311			`li $2,-5`
312			`li $3,-13`
313			`mult $2,$3`
314			`mfhi $5`
315			`mflo $4`
316			`addu $4,$4,$5`
317			`addi $4,$4,3`
318			`sb $4,0($20) #D`
319			`lui $4,0xfe98`
320			`ori $4,$4,0x62e5`
321			`lui $5,0x6`
322			`ori $5,0x8db8`
323			`mult $4,$5`
324			`mfhi $6`
325			`addiu $7,$6,2356+1+'E' #E`
326			`sb $7,0($20)`
327			`sb $23,0($20)`
328			`sb $21,0($20)`
329
330			`#h: MULTU`
331			`ori $2,$0,'h'`
332			`sb $2,0($20)`
333			`ori $2,$0,5`
334			`ori $3,$0,13`
335			`multu $2,$3`
336			`nop`
337			`mflo $4`
338			`sb $4,0($20) #A`
339			`sb $23,0($20)`
340			`sb $21,0($20)`
341	4	ja_rd	`.endif`
342	2	ja_rd
343			`#i: SLT`
344			`ori $2,$0,'i'`
345			`sb $2,0($20)`
346			`ori $2,$0,10`
347			`ori $3,$0,12`
348			`slt $4,$2,$3`
349			`addi $5,$4,64`
350			`sb $5,0($20) #A`
351			`slt $4,$3,$2`
352			`addi $5,$4,66`
353			`sb $5,0($20) #B`
354			`li $2,0xfffffff0`
355			`slt $4,$2,$3`
356			`addi $5,$4,66`
357			`sb $5,0($20) #C`
358			`slt $4,$3,$2`
359			`addi $5,$4,68`
360			`sb $5,0($20) #D`
361			`li $3,0xffffffff`
362			`slt $4,$2,$3`
363			`addi $5,$4,68`
364			`sb $5,0($20) #E`
365			`slt $4,$3,$2`
366			`addi $5,$4,70`
367			`sb $5,0($20) #F`
368			`sb $23,0($20)`
369			`sb $21,0($20)`
370
371			`#j: SLTI`
372			`ori $2,$0,'j'`
373			`sb $2,0($20)`
374			`ori $2,$0,10`
375			`slti $4,$2,12`
376			`addi $5,$4,64`
377			`sb $5,0($20) #A`
378			`slti $4,$2,8`
379			`addi $5,$4,66`
380			`sb $5,0($20) #B`
381			`sb $23,0($20)`
382			`sb $21,0($20)`
383
384			`#k: SLTIU`
385			`ori $2,$0,'k'`
386			`sb $2,0($20)`
387			`ori $2,$0,10`
388			`sltiu $4,$2,12`
389			`addi $5,$4,64`
390			`sb $5,0($20) #A`
391			`sltiu $4,$2,8`
392			`addi $5,$4,66`
393			`sb $5,0($20) #B`
394			`sb $23,0($20)`
395			`sb $21,0($20)`
396
397			`#l: SLTU`
398			`ori $2,$0,'l'`
399			`sb $2,0($20)`
400			`ori $2,$0,10`
401			`ori $3,$0,12`
402			`slt $4,$2,$3`
403			`addi $5,$4,64`
404			`sb $5,0($20) #A`
405			`slt $4,$3,$2`
406			`addi $5,$4,66`
407			`sb $5,0($20) #B`
408			`sb $23,0($20)`
409			`sb $21,0($20)`
410
411			`#m: SUB`
412			`ori $2,$0,'m'`
413			`sb $2,0($20)`
414			`ori $3,$0,70`
415			`ori $4,$0,5`
416			`sub $2,$3,$4`
417			`sb $2,0($20) #A`
418			`sb $23,0($20)`
419			`sb $21,0($20)`
420
421			`#n: SUBU`
422			`ori $2,$0,'n'`
423			`sb $2,0($20)`
424			`ori $3,$0,70`
425			`ori $4,$0,5`
426			`sub $2,$3,$4`
427			`sb $2,0($20) #A`
428			`sb $23,0($20)`
429			`sb $21,0($20)`
430
431			`######################################`
432			`#Branch and Jump Instructions`
433			`######################################`
434			`BranchTest:`
435			`ori $2,$0,'B'`
436			`sb $2,0($20)`
437			`ori $2,$0,'r'`
438			`sb $2,0($20)`
439			`ori $2,$0,'a'`
440			`sb $2,0($20)`
441			`ori $2,$0,'n'`
442			`sb $2,0($20)`
443			`ori $2,$0,'c'`
444			`sb $2,0($20)`
445			`ori $2,$0,'h'`
446			`sb $2,0($20)`
447			`sb $23,0($20)`
448			`sb $21,0($20)`
449
450			`#a: B`
451			`ori $2,$0,'a'`
452			`sb $2,0($20)`
453			`ori $10,$0,'A'`
454			`ori $11,$0,'B'`
455			`b $B1`
456			`sb $10,0($20)`
457			`sb $22,0($20)`
458			`$B1:`
459			`sb $11,0($20)`
460			`sb $23,0($20)`
461			`sb $21,0($20)`
462
463			`#b: BAL`
464			`ori $2,$0,'b'`
465			`sb $2,0($20)`
466			`ori $10,$0,'A'`
467			`ori $11,$0,'B'`
468			`ori $12,$0,'C'`
469			`ori $13,$0,'D'`
470			`ori $14,$0,'E'`
471			`ori $15,$0,'X'`
472			`bal $BAL1`
473			`sb $10,0($20)`
474			`sb $13,0($20)`
475			`b $BAL2`
476			`sb $14,0($20)`
477			`sb $15,0($20)`
478			`$BAL1:`
479			`sb $11,0($20)`
480			`jr $31`
481			`sb $12,0($20)`
482			`sb $22,0($20)`
483			`$BAL2:`
484			`sb $23,0($20)`
485			`sb $21,0($20)`
486
487			`#c: BEQ`
488			`ori $2,$0,'c'`
489			`sb $2,0($20)`
490			`ori $10,$0,'A'`
491			`ori $11,$0,'B'`
492			`ori $12,$0,'C'`
493			`ori $13,$0,'D'`
494			`ori $2,$0,100`
495			`ori $3,$0,123`
496			`ori $4,$0,123`
497			`beq $2,$3,$BEQ1`
498			`sb $10,0($20)`
499			`sb $11,0($20)`
500			`beq $3,$4,$BEQ1`
501			`sb $12,0($20)`
502			`sb $22,0($20)`
503			`$BEQ1:`
504			`sb $13,0($20)`
505			`sb $23,0($20)`
506			`sb $21,0($20)`
507
508			`#d: BGEZ`
509			`ori $2,$0,'d'`
510			`sb $2,0($20)`
511			`ori $10,$0,'A'`
512			`ori $11,$0,'B'`
513			`ori $12,$0,'C'`
514			`ori $13,$0,'D'`
515			`or $15,$0,'X'`
516			`ori $2,$0,100`
517			`li $3,0xffff1234`
518			`ori $4,$0,123`
519			`bgez $3,$BGEZ1`
520			`sb $10,0($20)`
521			`sb $11,0($20)`
522			`bgez $2,$BGEZ1`
523			`sb $12,0($20)`
524			`sb $22,0($20)`
525			`$BGEZ1:`
526			`bgez $0,$BGEZ2`
527			`nop`
528			`sb $15,0($20)`
529			`$BGEZ2:`
530			`sb $13,0($20)`
531			`sb $23,0($20)`
532			`sb $21,0($20)`
533
534			`#e: BGEZAL`
535			`ori $2,$0,'e'`
536			`sb $2,0($20)`
537			`ori $10,$0,'A'`
538			`ori $11,$0,'B'`
539			`ori $12,$0,'C'`
540			`ori $13,$0,'D'`
541			`ori $14,$0,'E'`
542			`ori $15,$0,'X'`
543			`li $3,0xffff1234`
544			`bgezal $3,$BGEZAL1`
545			`nop`
546			`sb $10,0($20)`
547			`bgezal $0,$BGEZAL1`
548			`nop`
549			`sb $13,0($20)`
550			`b $BGEZAL2`
551			`sb $14,0($20)`
552			`sb $15,0($20)`
553			`$BGEZAL1:`
554			`sb $11,0($20)`
555			`jr $31`
556			`sb $12,0($20)`
557			`sb $22,0($20)`
558			`$BGEZAL2:`
559			`sb $23,0($20)`
560			`sb $21,0($20)`
561
562			`#f: BGTZ`
563			`ori $2,$0,'f'`
564			`sb $2,0($20)`
565			`ori $10,$0,'A'`
566			`ori $11,$0,'B'`
567			`ori $12,$0,'C'`
568			`ori $13,$0,'D'`
569			`ori $2,$0,100`
570			`li $3,0xffff1234`
571			`bgtz $3,$BGTZ1`
572			`sb $10,0($20)`
573			`sb $11,0($20)`
574			`bgtz $2,$BGTZ1`
575			`sb $12,0($20)`
576			`sb $22,0($20)`
577			`$BGTZ1:`
578			`sb $13,0($20)`
579			`sb $23,0($20)`
580			`sb $21,0($20)`
581
582			`#g: BLEZ`
583			`ori $2,$0,'g'`
584			`sb $2,0($20)`
585			`ori $10,$0,'A'`
586			`ori $11,$0,'B'`
587			`ori $12,$0,'C'`
588			`ori $13,$0,'D'`
589			`ori $2,$0,100`
590			`li $3,0xffff1234`
591			`blez $2,$BLEZ1`
592			`sb $10,0($20)`
593			`sb $11,0($20)`
594			`blez $3,$BLEZ1`
595			`sb $12,0($20)`
596			`sb $22,0($20)`
597			`$BLEZ1:`
598			`blez $0,$BLEZ2`
599			`nop`
600			`sb $22,0($20)`
601			`$BLEZ2:`
602			`sb $13,0($20)`
603			`sb $23,0($20)`
604			`sb $21,0($20)`
605
606			`#h: BLTZ`
607			`ori $2,$0,'h'`
608			`sb $2,0($20)`
609			`ori $10,$0,'A'`
610			`ori $11,$0,'B'`
611			`ori $12,$0,'C'`
612			`ori $13,$0,'D'`
613			`ori $14,$0,'E'`
614			`ori $2,$0,100`
615			`li $3,0xffff1234`
616			`ori $4,$0,0`
617			`bltz $2,$BLTZ1`
618			`sb $10,0($20)`
619			`sb $11,0($20)`
620			`bltz $3,$BLTZ1`
621			`sb $12,0($20)`
622			`sb $22,0($20)`
623			`$BLTZ1:`
624			`bltz $4,$BLTZ2`
625			`nop`
626			`sb $13,0($20)`
627			`$BLTZ2:`
628			`sb $14,0($20)`
629			`sb $23,0($20)`
630			`sb $21,0($20)`
631
632			`#i: BLTZAL`
633			`ori $2,$0,'i'`
634			`sb $2,0($20)`
635			`ori $10,$0,'A'`
636			`ori $11,$0,'B'`
637			`ori $12,$0,'C'`
638			`ori $13,$0,'D'`
639			`ori $14,$0,'E'`
640			`ori $15,$0,'X'`
641			`li $3,0xffff1234`
642			`bltzal $0,$BLTZAL1`
643			`nop`
644			`sb $10,0($20)`
645			`bltzal $3,$BLTZAL1`
646			`nop`
647			`sb $13,0($20)`
648			`b $BLTZAL2`
649			`sb $14,0($20)`
650			`sb $15,0($20)`
651			`$BLTZAL1:`
652			`sb $11,0($20)`
653			`jr $31`
654			`sb $12,0($20)`
655			`sb $22,0($20)`
656			`$BLTZAL2:`
657			`sb $23,0($20)`
658			`sb $21,0($20)`
659
660			`#j: BNE`
661			`ori $2,$0,'j'`
662			`sb $2,0($20)`
663			`ori $10,$0,'A'`
664			`ori $11,$0,'B'`
665			`ori $12,$0,'C'`
666			`ori $13,$0,'D'`
667			`ori $2,$0,100`
668			`ori $3,$0,123`
669			`ori $4,$0,123`
670			`bne $3,$4,$BNE1`
671			`sb $10,0($20)`
672			`sb $11,0($20)`
673			`bne $2,$3,$BNE1`
674			`sb $12,0($20)`
675			`sb $22,0($20)`
676			`$BNE1:`
677			`sb $13,0($20)`
678			`sb $23,0($20)`
679			`sb $21,0($20)`
680
681			`#k: J`
682			`ori $2,$0,'k'`
683			`sb $2,0($20)`
684			`ori $10,$0,'A'`
685			`ori $11,$0,'B'`
686			`ori $15,$0,'X'`
687			`j $J1`
688			`sb $10,0($20)`
689			`sb $15,0($20)`
690			`$J1:`
691			`sb $11,0($20)`
692			`sb $23,0($20)`
693			`sb $21,0($20)`
694
695			`#l: JAL`
696			`ori $2,$0,'l'`
697			`sb $2,0($20)`
698			`ori $10,$0,'A'`
699			`ori $11,$0,'B'`
700			`ori $12,$0,'C'`
701			`ori $13,$0,'D'`
702			`ori $14,$0,'E'`
703			`ori $15,$0,'X'`
704			`jal $JAL1`
705			`sb $10,0($20)`
706			`sb $13,0($20)`
707			`b $JAL2`
708			`sb $14,0($20)`
709			`sb $15,0($20)`
710			`$JAL1:`
711			`sb $11,0($20)`
712			`jr $31`
713			`sb $12,0($20)`
714			`sb $22,0($20)`
715			`$JAL2:`
716			`sb $23,0($20)`
717			`sb $21,0($20)`
718
719			`#m: JALR`
720			`ori $2,$0,'m'`
721			`sb $2,0($20)`
722			`ori $10,$0,'A'`
723			`ori $11,$0,'B'`
724			`ori $12,$0,'C'`
725			`ori $13,$0,'D'`
726			`ori $14,$0,'E'`
727			`ori $15,$0,'X'`
728			`la $3,$JALR1`
729			`jalr $3`
730			`sb $10,0($20)`
731			`sb $13,0($20)`
732			`b $JALR2`
733			`sb $14,0($20)`
734			`sb $15,0($20)`
735			`$JALR1:`
736			`sb $11,0($20)`
737			`jr $31`
738			`sb $12,0($20)`
739			`sb $22,0($20)`
740			`$JALR2:`
741			`sb $23,0($20)`
742			`sb $21,0($20)`
743
744			`#n: JR`
745			`ori $2,$0,'n'`
746			`sb $2,0($20)`
747			`ori $10,$0,'A'`
748			`ori $11,$0,'B'`
749			`ori $15,$0,'X'`
750			`la $3,$JR1`
751			`jr $3`
752			`sb $10,0($20)`
753			`sb $15,0($20)`
754			`$JR1:`
755			`sb $11,0($20)`
756			`sb $23,0($20)`
757			`sb $21,0($20)`
758
759			`#o: NOP`
760			`ori $2,$0,'o'`
761			`sb $2,0($20)`
762			`ori $2,$0,65`
763			`nop`
764			`sb $2,0($20)`
765			`sb $23,0($20)`
766			`sb $21,0($20)`
767
768			`# b LoadTest`
769
770	4	ja_rd
771	2	ja_rd	`BreakTest:`
772	4	ja_rd	`.ifgt TEST_BREAK`
773	2	ja_rd	`#p: BREAK`
774	4	ja_rd	`ori $2,$0,'p' # check if it jumps to break address and comes back`
775	2	ja_rd	`sb $2,0($20)`
776			`ori $2,$0,'z'`
777			`ori $4,$0,59`
778			`break 0`
779			`addi $4,$4,1`
780			`sb $4,0($20)`
781	4	ja_rd
782			`break 0 # check if load instruction is aborted (@log)`
783			`lb $2,16($2)`
784
785			`break 0 # check if jump instruction is aborted (@log)`
786	9	ja_rd	`j break_jump_test1`
787	4	ja_rd	`add $4,$4,5`
788
789	9	ja_rd	`break_jump_test1:`
790	4	ja_rd	`add $4,$4,1 # make sure the jump shows in the log (@log)`
791
792	29	ja_rd	`break 0 # check if store instruction is aborted`
793			`sb $4,0($20)`
794
795	152	ja_rd	`j break_jump_test2 # check if break works in delay slot of jump`
796	29	ja_rd	`break 0`
797	9	ja_rd	`nop`
798			`j break_continue`
799			`nop`
800
801			`break_jump_test2:`
802			`add $4,$4,1`
803
804			`break_continue:`
805	2	ja_rd	`sb $23,0($20)`
806	4	ja_rd	`sb $21,0($20)`
807			`.endif`
808	2	ja_rd
809			`#q: SYSCALL`
810	14	ja_rd	`ori $2,$0,'q' # check if it jumpts to trap vector and comes back`
811	2	ja_rd	`sb $2,0($20)`
812			`ori $4,$0,61`
813			`syscall 0`
814			`addi $4,$4,-1`
815			`sb $4,0($20)`
816	14	ja_rd
817			`syscall 0 # check if load instruction is aborted (@log)`
818			`lb $2,16($2)`
819
820			`syscall 0 # check if jump instruction is aborted (@log)`
821			`j syscall_jump_test1`
822			`add $4,$4,5`
823
824			`syscall_jump_test1:`
825			`add $4,$4,1 # make sure the jump shows in the log (@log)`
826
827	152	ja_rd	`j syscall_jump_test2 # check if syscall works in delay slot of jump`
828			`syscall 0`
829	14	ja_rd	`nop`
830			`j syscall_continue`
831			`nop`
832
833			`syscall_jump_test2:`
834			`add $4,$4,1`
835
836			`syscall_continue:`
837	2	ja_rd	`sb $23,0($20)`
838			`sb $21,0($20)`
839
840
841			`######################################`
842			`#Load, Store, and Memory Control Instructions`
843			`######################################`
844			`LoadTest:`
845			`ori $2,$0,'L'`
846			`sb $2,0($20)`
847			`ori $2,$0,'o'`
848			`sb $2,0($20)`
849			`ori $2,$0,'a'`
850			`sb $2,0($20)`
851			`ori $2,$0,'d'`
852			`sb $2,0($20)`
853			`sb $23,0($20)`
854			`sb $21,0($20)`
855
856			`#a: LB`
857			`ori $2,$0,'a'`
858			`sb $2,0($20)`
859			`or $2,$0,$24`
860			`li $3,0x414243fc`
861			`sw $3,16($2) # 16($2) = 0x414243fc`
862			`lb $4,16($2) # $4 = 0x41`
863			`sb $4,0($20) # UART = 0x41`
864			`lb $4,17($2) # $4 = 0x42`
865			`nop`
866			`sb $4,0($20) # UART = 0x42`
867			`lb $4,18($2) # $4 = 0x43`
868			`nop`
869			`sb $4,0($20) # UART = 0x43`
870			`lb $2,19($2) # $2 = 0xffff.fffc`
871			`nop`
872			`sra $3,$2,8 # $3 = 0xffff.ffff`
873			`addi $3,$3,0x45 # $3 = 0x44`
874			`sb $3,0($20) # UART = 0x44`
875			`addi $2,$2,0x49 # $4 = 0x45, overflow`
876			`sb $2,0($20) # UART = 0x45`
877			`sb $23,0($20) # UART = CR`
878			`sb $21,0($20) # UART = LF`
879
880			`#b: LBU`
881			`ori $2,$0,'b'`
882			`sb $2,0($20)`
883			`or $2,$0,$24`
884			`li $3,0x41424344`
885			`sw $3,16($2)`
886			`lb $4,16($2)`
887			`sb $4,0($20)`
888			`lb $4,17($2)`
889			`sb $4,0($20)`
890			`lb $4,18($2)`
891			`sb $4,0($20)`
892			`lb $2,19($2)`
893			`sb $2,0($20)`
894			`sb $23,0($20)`
895			`sb $21,0($20)`
896
897			`#c: LH`
898			`ori $2,$0,'c'`
899			`sb $2,0($20)`
900			`or $2,$0,$24`
901			`li $3,0x00410042`
902			`sw $3,16($2)`
903			`lh $4,16($2)`
904			`sb $4,0($20)`
905			`lh $2,18($2)`
906			`sb $2,0($20)`
907			`sb $23,0($20)`
908			`sb $21,0($20)`
909
910			`#d: LHU`
911			`ori $2,$0,'d'`
912			`sb $2,0($20)`
913			`or $2,$0,$24`
914			`li $3,0x00410042`
915			`sw $3,16($2)`
916			`lh $4,16($2)`
917			`sb $4,0($20)`
918			`lh $2,18($2)`
919			`sb $2,0($20)`
920			`sb $23,0($20)`
921			`sb $21,0($20)`
922
923			`#e: LW`
924			`ori $2,$0,'e'`
925			`sb $2,0($20)`
926			`or $2,$0,$24`
927			`li $3,'A'`
928			`sw $3,16($2)`
929			`ori $3,$0,0`
930			`lw $2,16($2)`
931			`sb $2,0($20)`
932			`sb $23,0($20)`
933			`sb $21,0($20)`
934
935			`.ifgt TEST_UNALIGNED_LOADS`
936			`#f: LWL & LWR`
937			`ori $2,$0,'f'`
938			`sb $2,0($20)`
939			`or $2,$0,$24`
940			`li $3,'A'`
941			`sw $3,16($2)`
942			`ori $3,$0,0`
943			`lwl $2,16($2)`
944			`lwr $2,16($2)`
945			`sb $2,0($20)`
946			`sb $23,0($20)`
947			`sb $21,0($20)`
948			`.endif`
949
950			`#g: SB`
951			`ori $2,$0,'g'`
952			`sb $2,0($20)`
953			`ori $2,$0,'A'`
954			`sb $2,0($20)`
955			`sb $23,0($20)`
956			`sb $21,0($20)`
957
958			`#h: SH`
959			`ori $2,$0,'h'`
960			`sb $2,0($20)`
961			`or $4,$0,$24`
962			`ori $2,$0,0x4142`
963			`sh $2,16($4)`
964			`lb $3,16($4)`
965			`sb $3,0($20)`
966			`lb $2,17($4)`
967			`sb $2,0($20)`
968			`sb $23,0($20)`
969			`sb $21,0($20)`
970
971			`#i: SW`
972			`ori $2,$0,'i'`
973			`sb $2,0($20)`
974			`or $2,$0,$24`
975			`li $3,0x41424344`
976			`sw $3,16($2)`
977			`lb $4,16($2)`
978			`sb $4,0($20)`
979			`lb $4,17($2)`
980			`sb $4,0($20)`
981			`lb $4,18($2)`
982			`sb $4,0($20)`
983			`lb $2,19($2)`
984			`sb $2,0($20)`
985			`sb $23,0($20)`
986			`sb $21,0($20)`
987
988			`.ifgt TEST_UNALIGNED_STORES`
989			`#j: SWL & SWR`
990			`ori $2,$0,'j'`
991			`sb $2,0($20)`
992			`or $2,$0,$24`
993			`li $3,0x41424344`
994			`swl $3,16($2)`
995			`swr $3,16($2)`
996			`lb $4,16($2)`
997			`sb $4,0($20)`
998			`lb $4,17($2)`
999			`sb $4,0($20)`
1000			`lb $4,18($2)`
1001			`sb $4,0($20)`
1002			`lb $2,19($2)`
1003			`sb $2,0($20)`
1004			`sb $23,0($20)`
1005			`sb $21,0($20)`
1006			`.endif`
1007
1008			`######################################`
1009			`#Logical Instructions`
1010			`######################################`
1011			`LogicalTest:`
1012			`ori $2,$0,'L'`
1013			`sb $2,0($20)`
1014			`ori $2,$0,'o'`
1015			`sb $2,0($20)`
1016			`ori $2,$0,'g'`
1017			`sb $2,0($20)`
1018			`ori $2,$0,'i'`
1019			`sb $2,0($20)`
1020			`ori $2,$0,'c'`
1021			`sb $2,0($20)`
1022			`sb $23,0($20)`
1023			`sb $21,0($20)`
1024
1025			`#a: AND`
1026			`ori $2,$0,'a'`
1027			`sb $2,0($20)`
1028			`ori $2,$0,0x0741`
1029			`ori $3,$0,0x60f3`
1030			`and $4,$2,$3`
1031			`sb $4,0($20)`
1032			`sb $23,0($20)`
1033			`sb $21,0($20)`
1034
1035			`#b: ANDI`
1036			`ori $2,$0,'b'`
1037			`sb $2,0($20)`
1038			`ori $2,$0,0x0741`
1039			`andi $4,$2,0x60f3`
1040			`sb $4,0($20)`
1041			`sb $23,0($20)`
1042			`sb $21,0($20)`
1043
1044			`#c: LUI`
1045			`ori $2,$0,'c'`
1046			`sb $2,0($20)`
1047			`lui $2,0x41`
1048			`srl $3,$2,16`
1049			`sb $3,0($20)`
1050			`sb $23,0($20)`
1051			`sb $21,0($20)`
1052
1053			`#d: NOR`
1054			`ori $2,$0,'d'`
1055			`sb $2,0($20)`
1056			`li $2,0xf0fff08e`
1057			`li $3,0x0f0f0f30`
1058			`nor $4,$2,$3`
1059			`sb $4,0($20)`
1060			`sb $23,0($20)`
1061			`sb $21,0($20)`
1062
1063			`#e: OR`
1064			`ori $2,$0,'e'`
1065			`sb $2,0($20)`
1066			`ori $2,$0,0x40`
1067			`ori $3,$0,0x01`
1068			`or $4,$2,$3`
1069			`sb $4,0($20)`
1070			`sb $23,0($20)`
1071			`sb $21,0($20)`
1072
1073			`#f: ORI`
1074			`ori $2,$0,'f'`
1075			`sb $2,0($20)`
1076			`ori $2,$0,0x40`
1077			`ori $4,$2,0x01`
1078			`sb $4,0($20)`
1079			`sb $23,0($20)`
1080			`sb $21,0($20)`
1081
1082			`#g: XOR`
1083			`ori $2,$0,'g'`
1084			`sb $2,0($20)`
1085			`ori $2,$0,0xf043`
1086			`ori $3,$0,0xf002`
1087			`xor $4,$2,$3`
1088			`sb $4,0($20)`
1089			`sb $23,0($20)`
1090			`sb $21,0($20)`
1091
1092			`#h: XORI`
1093			`ori $2,$0,'h'`
1094			`sb $2,0($20)`
1095			`ori $2,$0,0xf043`
1096			`xor $4,$2,0xf002`
1097			`sb $4,0($20)`
1098			`sb $23,0($20)`
1099			`sb $21,0($20)`
1100
1101
1102			`######################################`
1103			`#Move Instructions`
1104			`######################################`
1105			`MoveTest:`
1106			`ori $2,$0,'M'`
1107			`sb $2,0($20)`
1108			`ori $2,$0,'o'`
1109			`sb $2,0($20)`
1110			`ori $2,$0,'v'`
1111			`sb $2,0($20)`
1112			`ori $2,$0,'e'`
1113			`sb $2,0($20)`
1114			`sb $23,0($20)`
1115			`sb $21,0($20)`
1116
1117	25	ja_rd	`# HI and LO are only implemented if the mul/div block is`
1118			`.ifgt (TEST_DIV + TEST_MUL)`
1119	2	ja_rd	`#a: MFHI`
1120			`ori $2,$0,'a'`
1121			`sb $2,0($20)`
1122			`ori $2,$0,65`
1123			`mthi $2`
1124			`mfhi $3`
1125			`sb $3,0($20)`
1126			`sb $23,0($20)`
1127			`sb $21,0($20)`
1128
1129			`#b: MFLO`
1130			`ori $2,$0,'b'`
1131			`sb $2,0($20)`
1132			`ori $2,$0,65`
1133			`mtlo $2`
1134			`mflo $3`
1135			`sb $3,0($20)`
1136			`sb $23,0($20)`
1137			`sb $21,0($20)`
1138
1139			`#c: MTHI`
1140			`ori $2,$0,'c'`
1141			`sb $2,0($20)`
1142			`ori $2,$0,65`
1143			`mthi $2`
1144			`mfhi $3`
1145			`sb $3,0($20)`
1146			`sb $23,0($20)`
1147			`sb $21,0($20)`
1148
1149			`#d: MTLO`
1150			`ori $2,$0,'d'`
1151			`sb $2,0($20)`
1152	66	ja_rd	`ori $2,$0,66 # use 'B' instead of 'A' to cach change in HI and LO`
1153	2	ja_rd	`mtlo $2`
1154			`mflo $3`
1155			`sb $3,0($20)`
1156			`sb $23,0($20)`
1157			`sb $21,0($20)`
1158	25	ja_rd	`.endif`
1159	2	ja_rd
1160			`######################################`
1161			`#Shift Instructions`
1162			`######################################`
1163			`ShiftTest:`
1164			`ori $2,$0,'S'`
1165			`sb $2,0($20)`
1166			`ori $2,$0,'h'`
1167			`sb $2,0($20)`
1168			`ori $2,$0,'i'`
1169			`sb $2,0($20)`
1170			`ori $2,$0,'f'`
1171			`sb $2,0($20)`
1172			`ori $2,$0,'t'`
1173			`sb $2,0($20)`
1174			`sb $23,0($20)`
1175			`sb $21,0($20)`
1176
1177			`#a: SLL`
1178			`ori $2,$0,'a'`
1179			`sb $2,0($20)`
1180			`li $2,0x40414243`
1181			`sll $3,$2,8`
1182			`srl $3,$3,24`
1183			`sb $3,0($20)`
1184			`sb $23,0($20)`
1185			`sb $21,0($20)`
1186
1187			`#b: SLLV`
1188			`ori $2,$0,'b'`
1189			`sb $2,0($20)`
1190			`li $2,0x40414243`
1191			`ori $3,$0,8`
1192			`sllv $3,$2,$3`
1193			`srl $3,$3,24`
1194			`sb $3,0($20)`
1195			`sb $23,0($20)`
1196			`sb $21,0($20)`
1197
1198			`#c: SRA`
1199			`ori $2,$0,'c'`
1200			`sb $2,0($20)`
1201			`li $2,0x40414243`
1202			`sra $3,$2,16`
1203			`sb $3,0($20)`
1204			`li $2,0x84000000`
1205			`sra $3,$2,25`
1206			`sub $3,$3,0x80`
1207			`sb $3,0($20)`
1208			`sb $23,0($20)`
1209			`sb $21,0($20)`
1210
1211			`#d: SRAV`
1212			`ori $2,$0,'d'`
1213			`sb $2,0($20)`
1214			`li $2,0x40414243`
1215			`ori $3,$0,16`
1216			`srav $3,$2,$3`
1217			`sb $3,0($20)`
1218			`ori $3,$0,25`
1219			`li $2,0x84000000`
1220			`srav $3,$2,$3`
1221			`sub $3,$3,0x80`
1222			`sb $3,0($20)`
1223			`sb $23,0($20)`
1224			`sb $21,0($20)`
1225
1226			`#e: SRL`
1227			`ori $2,$0,'e'`
1228			`sb $2,0($20)`
1229			`li $2,0x40414243`
1230			`srl $3,$2,16`
1231			`sb $3,0($20)`
1232			`li $2,0x84000000`
1233			`srl $3,$2,25`
1234			`sb $3,0($20)`
1235			`sb $23,0($20)`
1236			`sb $21,0($20)`
1237
1238			`#f: SRLV`
1239			`ori $2,$0,'f'`
1240			`sb $2,0($20)`
1241			`li $2,0x40414243`
1242			`ori $3,$0,16`
1243			`srlv $4,$2,$3`
1244			`sb $4,0($20)`
1245			`ori $3,$0,25`
1246			`li $2,0x84000000`
1247			`srlv $3,$2,$3`
1248			`sb $3,0($20)`
1249			`sb $23,0($20)`
1250			`sb $21,0($20)`
1251
1252	165	ja_rd	`######################################`
1253			`#Emulated MIPS32r2 Instructions`
1254			`######################################`
1255	203	ja_rd	`.ifgt TEST_BAD_OPCODES`
1256	165	ja_rd	`ori $2,$0,'M'`
1257			`sb $2,0($20)`
1258			`ori $2,$0,'i'`
1259			`sb $2,0($20)`
1260			`ori $2,$0,'p'`
1261			`sb $2,0($20)`
1262			`ori $2,$0,'s'`
1263			`sb $2,0($20)`
1264			`ori $2,$0,'3'`
1265			`sb $2,0($20)`
1266			`ori $2,$0,'2'`
1267			`sb $2,0($20)`
1268			`ori $2,$0,'r'`
1269			`sb $2,0($20)`
1270			`ori $2,$0,'2'`
1271			`sb $2,0($20)`
1272			`sb $23,0($20)`
1273			`sb $21,0($20)`
1274
1275			`#-- EXT ---------------------------`
1276			`ori $a1,$zero,'a'`
1277			`sb $a1,0($20)`
1278			`li $a0,0x01234567`
1279			`ext $a1,$a0,12,8`
1280			`addi $a1,$a1,'A' - 0x34`
1281			`sb $a1,0($20)`
1282			`ext $a1,$a0,0,8`
1283			`addi $a1,$a1,'B' - 0x67`
1284			`sb $a1,0($20)`
1285			`ext $a1,$a0,0,4`
1286			`addi $a1,$a1,'C' - 0x7`
1287			`sb $a1,0($20)`
1288			`ext $a2,$a0,20,12`
1289			`addi $a2,$a2,'D' - 0x012`
1290			`sb $a2,0($20)`
1291
1292			`sb $23,0($20)`
1293			`sb $21,0($20)`
1294
1295			`#-- INS ---------------------------`
1296			`ori $a1,$zero,'b'`
1297			`sb $a1,0($20)`
1298			`li $a0,0x01234567`
1299			`ori $a2,$zero,0xc35a`
1300			`test_ins_1:`
1301			`move $a1,$a0`
1302			`ins $a1,$a2,0,8`
1303			`li $a3,0x0123455a`
1304			`bne $a3,$a1,test_ins_2`
1305			`ori $a1,$zero,'A'`
1306			`sb $a1,0($20)`
1307			`test_ins_2:`
1308			`move $a1,$a0`
1309			`ins $a1,$a2,4,8`
1310			`li $a3,0x012345a7`
1311			`bne $a3,$a1,test_ins_3`
1312			`ori $a1,$zero,'B'`
1313			`sb $a1,0($20)`
1314			`test_ins_3:`
1315			`move $a1,$a0`
1316			`ins $a1,$a2,24,8`
1317			`li $a3,0x5a234567`
1318			`bne $a3,$a1,test_ins_4`
1319			`ori $a1,$zero,'C'`
1320			`sb $a1,0($20)`
1321			`test_ins_4:`
1322			`move $a1,$a0`
1323			`ins $a1,$a2,30,2`
1324			`li $a3,0x81234567`
1325			`bne $a3,$a1,test_ins_5`
1326			`ori $a1,$zero,'D'`
1327			`sb $a1,0($20)`
1328			`test_ins_5:`
1329			`sb $23,0($20)`
1330			`sb $21,0($20)`
1331
1332			`#-- CLZ ---------------------------`
1333			`ori $a1,$zero,'c'`
1334			`sb $a1,0($20)`
1335
1336			`li $a1,0x00080000`
1337			`clz $a1,$a1`
1338			`addiu $a1,$a1,'A'-12`
1339			`sb $a1,0($20)`
1340
1341			`li $a1,0x40000000`
1342			`clz $a1,$a1`
1343			`addiu $a1,$a1,'B'-1`
1344			`sb $a1,0($20)`
1345
1346			`clz $a1,$zero`
1347			`addiu $a1,$a1,'C'-32`
1348			`sb $a1,0($20)`
1349
1350			`li $k1,0x80000000`
1351			`clz $k0,$k1`
1352			`addiu $a1,$k0,'D'-0`
1353			`sb $a1,0($20)`
1354
1355			`sb $23,0($20)`
1356			`sb $21,0($20)`
1357
1358			`#-- CLO ---------------------------`
1359			`ori $a1,$zero,'d'`
1360			`sb $a1,0($20)`
1361
1362			`li $a1,0xfff7ffff`
1363			`clo $a1,$a1`
1364			`addiu $a1,$a1,'A'-12`
1365			`sb $a1,0($20)`
1366
1367			`li $a1,0xbfffffff`
1368			`clo $a1,$a1`
1369			`addiu $a1,$a1,'B'-1`
1370			`sb $a1,0($20)`
1371
1372			`li $a1,0xffffffff`
1373			`clo $a1,$a1`
1374			`addiu $a1,$a1,'C'-32`
1375			`sb $a1,0($20)`
1376
1377			`li $k1,0x7fffffff`
1378			`clo $k0,$k1`
1379			`addiu $a1,$k0,'D'-0`
1380			`sb $a1,0($20)`
1381
1382			`sb $23,0($20)`
1383			`sb $21,0($20)`
1384	203	ja_rd
1385			`# FIXME should test the bad opcode emulation in delay slots`
1386	165	ja_rd	`.endif`
1387
1388	203	ja_rd
1389
1390	165	ja_rd	`# Print 'Done'; the rest of the tests are for log matching only`
1391	2	ja_rd	`ori $2,$0,'D'`
1392			`sb $2,0($20)`
1393			`ori $2,$0,'o'`
1394			`sb $2,0($20)`
1395			`ori $2,$0,'n'`
1396			`sb $2,0($20)`
1397			`ori $2,$0,'e'`
1398			`sb $2,0($20)`
1399			`sb $23,0($20)`
1400			`sb $21,0($20)`
1401	38	ja_rd
1402	165	ja_rd
1403	90	ja_rd	`# These tests are to be evaluated by matching logs with the software`
1404			`# simulator. There is no need to perform any actual tests here, if there is`
1405			`# any error it will show up as a mismatch in the logs.`
1406
1407			`#-- Arithmetic --------------------------------------------------`
1408			`ori $s0,$zero,0xa5a5`
1409			`ori $s1,$zero,15`
1410			`ori $s2,$zero,1`
1411			`li $s3,-1`
1412			`li $s4,-1000`
1413			`li $s5,0x80000000`
1414			`li $s6,0x7fffffff`
1415
1416			`#-- ADD ---------------------------`
1417			`move $t0,$s0 # P + P = P`
1418			`move $t1,$s1`
1419			`add $t0,$t1,$s1`
1420			`move $t0,$s0 # P + N = P`
1421			`move $t1,$s1`
1422			`add $t0,$t1,$s3`
1423			`move $t0,$s0 # P + N = N`
1424			`move $t1,$s1`
1425			`add $t0,$t1,$s4`
1426			`move $t0,$s0 # P + P = N (overflow)`
1427			`move $t1,$s6`
1428			`add $t0,$t1,$s6`
1429			`move $t0,$s0 # N + N = P (overflow)`
1430			`move $t1,$s5`
1431			`add $t0,$t1,$s5`
1432
1433			`#-- ADDI --------------------------`
1434			`move $t0,$s0 # N + N = P (overflow)`
1435			`move $t1,$s5`
1436			`addi $t0,$t1,-1`
1437			`move $t0,$s0 # N + P = N`
1438			`move $t1,$s5`
1439			`addi $t0,$t1,15`
1440			`move $t0,$s0 # N + P = P`
1441			`move $t1,$s3`
1442			`addi $t0,$t1,2`
1443			`move $t0,$s0 # P + P = P`
1444			`move $t1,$s1`
1445			`addi $t0,$t1,2`
1446			`move $t0,$s0 # P + P = N (overflow)`
1447			`move $t1,$s6`
1448			`addi $t0,$t1,2`
1449
1450			`#-- ADDIU -------------------------`
1451			`move $t0,$s0 # N + N = P (overflow)`
1452			`move $t1,$s5`
1453			`addiu $t0,$t1,-1`
1454			`move $t0,$s0 # N + P = N`
1455			`move $t1,$s5`
1456			`addiu $t0,$t1,15`
1457			`move $t0,$s0 # N + P = P`
1458			`move $t1,$s3`
1459			`addiu $t0,$t1,2`
1460			`move $t0,$s0 # P + P = P`
1461			`move $t1,$s1`
1462			`addiu $t0,$t1,2`
1463			`move $t0,$s0 # P + P = N (overflow)`
1464			`move $t1,$s6`
1465			`addiu $t0,$t1,2`
1466
1467			`#-- ADDU --------------------------`
1468			`move $t0,$s0 # P + P = P`
1469			`move $t1,$s1`
1470			`addu $t0,$t1,$s1`
1471			`move $t0,$s0 # P + N = P`
1472			`move $t1,$s1`
1473			`addu $t0,$t1,$s3`
1474			`move $t0,$s0 # P + N = N`
1475			`move $t1,$s1`
1476			`addu $t0,$t1,$s4`
1477			`move $t0,$s0 # P + P = N (overflow)`
1478			`move $t1,$s6`
1479			`addu $t0,$t1,$s6`
1480			`move $t0,$s0 # N + N = P (overflow)`
1481			`move $t1,$s5`
1482			`addu $t0,$t1,$s5`
1483
1484			`#-- SUB ---------------------------`
1485			`move $t0,$s0 # P - P = P`
1486			`move $t1,$s2`
1487			`sub $t0,$t1,$s1`
1488			`move $t0,$s0 # P - N = P`
1489			`move $t1,$s1`
1490			`add $t0,$t1,$s3`
1491			`move $t0,$s0 # P + N = N`
1492			`move $t1,$s1`
1493			`add $t0,$t1,$s4`
1494			`move $t0,$s0 # P + P = N (overflow)`
1495			`move $t1,$s6`
1496			`add $t0,$t1,$s6`
1497			`move $t0,$s0 # N + N = P (overflow)`
1498			`move $t1,$s5`
1499			`add $t0,$t1,$s5`
1500
1501			`# SLT, SLTI, SLTIU`
1502			`ori $a2,$zero,0xa5a5`
1503			`ori $a0,$zero,15`
1504			`ori $a1,$zero,1`
1505			`move $v0,$a3`
1506			`slt $v0,$a0,$a1`
1507			`move $v0,$a3`
1508			`slt $v0,$a1,$a0`
1509			`move $v0,$a3`
1510			`slti $v0,$a0,1`
1511			`move $v0,$a3`
1512			`slti $v0,$a1,15`
1513			`move $v0,$a3`
1514			`sltiu $v0,$a0,1`
1515			`move $v0,$a3`
1516			`sltiu $v0,$a1,15`
1517			`li $a1,0xa5a5`
1518			`li $a0,1029`
1519			`addiu $a0,$a0,-2000`
1520			`sltu $a1,$a0,1000`
1521
1522
1523			`#-- Relative jumps ----------------------------------------------`
1524			`li $s0,0x7fffffff`
1525			`ori $s1,1000`
1526			`ori $s1,15`
1527			`ori $s1,2`
1528			`li $s4,0x80000000`
1529			`li $s5,-1001`
1530			`li $s6,-16`
1531			`li $s7,-3`
1532
1533			`bgtz $s1,test_b0`
1534			`nop`
1535			`ori $v0,0x5500`
1536			`test_b0:`
1537			`bgtz $s7,test_b1`
1538			`nop`
1539			`ori $v0,0x5501`
1540			`test_b1:`
1541			`bgtz $s0,test_b2`
1542			`nop`
1543			`ori $v0,0x5502`
1544			`test_b2:`
1545			`bgtz $s4,test_b3`
1546			`nop`
1547			`ori $v0,0x5503`
1548			`test_b3:`
1549			`bgez $s1,test_b4`
1550			`nop`
1551			`ori $v0,0x5500`
1552			`test_b4:`
1553			`bgez $s7,test_b5`
1554			`nop`
1555			`ori $v0,0x5501`
1556			`test_b5:`
1557			`bgez $s0,test_b6`
1558			`nop`
1559			`ori $v0,0x5502`
1560			`test_b6:`
1561			`bgez $s4,test_b7`
1562			`nop`
1563			`ori $v0,0x5503`
1564			`test_b7:`
1565			`bltz $s1,test_b8`
1566			`nop`
1567			`ori $v0,0x5500`
1568			`test_b8:`
1569			`bltz $s7,test_b9`
1570			`nop`
1571			`ori $v0,0x5501`
1572			`test_b9:`
1573			`bltz $s0,test_b10`
1574			`nop`
1575			`ori $v0,0x5502`
1576			`test_b10:`
1577			`bltz $s4,test_b11`
1578			`nop`
1579			`ori $v0,0x5503`
1580			`test_b11:`
1581
1582	203	ja_rd	`#-- Hardware interrupts -----------------------------------------`
1583			`test_hw_irq:`
1584			`.ifgt TEST_HW_INTS`
1585			`li $a0,0x20010000 # base address of debug reg block`
1586
1587			`# Trigger IRQ_0 in 10 instruction cycles (@note1)`
1588			`#lhu $a1,10 # load irq count down register...`
1589			`li $a1,10`
1590			`sw $a1,0($a0)`
1591			`lhu $a2,20`
1592			`test_hw_irq_0:`
1593			`bnez $a2,test_hw_irq_0 # ...and wait for irq to trigger`
1594			`addiu $a2,$a2,-1`
1595
1596			`# When we arrive here, we should have executed the irq handler if`
1597			`# the irq worked properly, so check it.`
1598
1599			`# FIXME incomplete code, stopped work here`
1600
1601			`.endif`
1602
1603	2	ja_rd	`$DONE:`
1604	203	ja_rd	`j $DONE # End in an infinite loop`
1605	2	ja_rd	`nop`
1606	148	ja_rd
1607			`# void setup_cache(void) -- invalidates all I- and D-Cache lines (uses no RAM)`
1608			`setup_cache:`
1609	152	ja_rd	`li $a0,0x00010002 # Enable I-cache line invalidation`
1610	148	ja_rd	`mtc0 $a0,$12`
1611
1612			`# In order to invalidate a I-Cache line we have to write its tag number to`
1613			`# any address while bits CP0[12].17:16=01. The write will be executed as a`
1614			`# regular write too, as a side effect, so we need to choose a harmless`
1615			`# target address. The BSS will do -- it will be cleared later.`
1616			`# We'll cover all ICACHE_NUM_LINES lines no matter what the starting`
1617			`# address is, anyway.`
1618
1619			`la $a0,__bss_start`
1620			`li $a2,0`
1621			`li $a1,ICACHE_NUM_LINES-1`
1622
1623			`inv_i_cache_loop:`
1624			`sw $a2,0($a0)`
1625			`blt $a2,$a1,inv_i_cache_loop`
1626			`addi $a2,1`
1627
1628			`# Now, the D-Cache is different. To invalidate a D-Cache line you just`
1629			`# read from it (by proper selection of a dummy target address) while bits`
1630			`# CP0[12].17:16=01. The data read is undefined and should be discarded.`
1631
1632			`li $a0,0 # Use any base address that is mapped`
1633			`li $a2,0`
1634			`li $a1,DCACHE_NUM_LINES-1`
1635
1636			`inv_d_cache_loop:`
1637			`lw $zero,0($a0)`
1638			`addi $a0,DCACHE_LINE_SIZE*4`
1639			`blt $a2,$a1,inv_d_cache_loop`
1640			`addi $a2,1`
1641
1642	152	ja_rd	`li $a1,0x00020002 # Leave with cache enabled`
1643	148	ja_rd	`jr $ra`
1644			`mtc0 $a1,$12`
1645	2	ja_rd	`.set reorder`
1646			`.end entry`
1647

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[/] [ion/] [trunk/] [src/] [opcodes/] [opcodes.s] - Blame information for rev 245