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ja_rd |
#-- Bring toolchain config parameters from the common makefile
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include ../common/makefile
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# Link script to be used: run from BRAM, use upper chunk of RAM, leaving
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# the memory from 0x0 onwards free to be initialized with the binary file
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# read from the SD card.
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LINK_SCRIPT = $(SRC_DIR)/common/boot.lds
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#-- Configure the application --------------------------------------------------
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# Simulation length in cycles; long enough to let the program run to completion.
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SIM_LENGTH = 90000
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# FPGA Block RAM parameters (size in words)
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# 16K is far too much BRAM; in a real world the bootloader would have to be
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# squeezed into a smaller space or placed in flash. For our purposes this
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# will do.
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BRAM_START = 0xbfc00000
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CODE_BRAM_SIZE = 4096
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# External RAM parameters (size in words)
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# We're using the top 16K of the main 512K RAM area; the rest will be filled
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# with the code read from disk.
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XRAM_SIZE = 4096
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XRAM_START = 0x0007BFFC
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# Here's where the FatFs source lives
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FATFS = ../common/fatfs
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# 1.- Put the code in internal BRAM and the data in external SRAM.
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# 2.- Do not use any of the standard libraries and use libsoc instead.
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LFLAGS = -T$(LINK_SCRIPT) -L $(LIB_PATH) \
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-Ttext $(BRAM_START) -Tdata $(XRAM_START) \
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-nodefaultlibs -nostdlib -ereset -I elf32-big
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CFLAGS = -O2 -Wall -c -s -fno-builtin -nodefaultlibs -nostdlib \
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-msoft-float -mips1 -G0 -I $(FATFS)
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AFLAGS = --defsym XRAM_BASE=$(XRAM_START)
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OBJS = bootstrap.o opcode_emu.o c_startup.o sdboot.o \
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$(FATFS)/mmcbb.o $(FATFS)/ff.o
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#-- Targets & rules ------------------------------------------------------------
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sdboot: sdboot.code
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@# This comment prevents use of implicit rule so our rules are used instead.
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@# This will save us a few harmless linker warnings.
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sdboot.axf: $(OBJS)
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$(LD) $(LFLAGS) -Map sdboot.map -s -N -o sdboot.axf $(OBJS) -lsoc
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-@$(DUMP) -m mips --disassemble sdboot.axf > sdboot.lst
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sdboot.code: sdboot.axf
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# Extract object code to be placed in code space
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$(COPY) -I elf32-big -O binary sdboot.axf sdboot.code
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# Rules for the assembly source files
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bootstrap.o: $(SRC_DIR)/common/bootstrap.s
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$(AS) $(AFLAGS) -o bootstrap.o $(SRC_DIR)/common/bootstrap.s
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c_startup.o: $(SRC_DIR)/common/c_startup.s
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$(AS) $(AFLAGS) -o c_startup.o $(SRC_DIR)/common/c_startup.s
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opcode_emu.o: $(SRC_DIR)/common/opcode_emu.s
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$(AS) $(AFLAGS) -o opcode_emu.o $(SRC_DIR)/common/opcode_emu.s
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#-- Let's make some implicit rules explicit for clarity (well, 'clarity')
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%.o: %.c
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$(CC) $(CFLAGS_MAIN) $< -o $@
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#-- Targets that build the synthesizable vhdl; meant for direct invocation -----
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#-- Create VHDL package with data and parameters for simulation
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sim: sdboot demo
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$(VHDL_OBJ_PKG) --project="SD Bootloader" \
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--package sim_params_pkg \
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--bin sdboot.code --name obj_code --bram_size $(CODE_BRAM_SIZE) \
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--name prom_init --flash_size 0 \
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--output $(TB_DIR)/sim_params_pkg.vhdl \
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-s $(SIM_LENGTH) --log_trigger=0xbfc00000 \
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#-- Create VHDL package with data and parameters for simulation and syntesis
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demo: sdboot
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$(VHDL_OBJ_PKG) --project="SD Bootloader" \
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--package obj_code_pkg \
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--bin sdboot.code --name obj_code --bram_size $(CODE_BRAM_SIZE) \
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--output $(DEMO_DIR)/../SoC/bootstrap_code_pkg.vhdl
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#-- And now the usual housekeeping stuff ---------------------------------------
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.PHONY: clean
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clean:
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-$(RM) *.o *.obj *.map *.lst *.hex *.exe *.axf *.code *.data *.bin
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-$(RM) $(FATFS)/*.o
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